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2 min read/Jan 16, 2025

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The Industry¡¯s First USB4 Device IP Certification Will Speed Innovation and Edge AI Enablement

By Morten Christiansen, Gervais Fong

Tags: AI & Machine Learning, Chip Design Insights, Interface IP, Silicon IP

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5 min read/Jan 09, 2025

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Multi-Die Health and Reliability: ²ÝÁñÉçÇø and TSMC Showcase UCIe Advances

By Faisal Goriawalla, Yervant Zorian

Tags: Multi-Die System, Silicon Lifecycle Management, Chip Design Insights, Interface IP, Silicon IP

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2 min read/Dec 11, 2024

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Enabling Massive AI Clusters with the Industry¡¯s First Ultra Ethernet and UALink IP ²ÝÁñÉçÇø

By Ron Lowman, Jon Ames

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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3 min read/Nov 21, 2024

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Advancing Software-Defined, Silicon-Optimized Data Centers

By ²ÝÁñÉçÇø Editorial Staff

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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2 min read/Nov 20, 2024

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World's First CXL 3.1 Multi-Vendor Interoperability Demo Showcases New Memory Possibilities for Hyperscale Data Centers

By Gary Ruggles, Gordon Getty

Tags: ²ÝÁñÉçÇø IP Technical Bulletin, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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2 min read/Nov 13, 2024

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Demonstrating the Future of 800G Ethernet at ECOC 2024

By Keivan Javadi Khasraghi

Tags: Chip Design Insights, Interface IP, Silicon IP

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4 min read/Sep 09, 2024

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²ÝÁñÉçÇø Introduces Industry¡¯s First 40G UCIe IP Solution to Power High-Performance Multi-Die Designs

By Manuel Mota

Tags: Multi-Die System, Chip Design Insights, Interface IP, Silicon IP

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3 min read/Aug 01, 2024

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Ultra Ethernet Consortium Set to Enable Scaling of Networking Interconnects for AI and HPC

By Jon Ames

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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4 min read/Jul 01, 2024

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CXL 3.1: How Evolving CXL Standards are Pushing Interconnects to Even Higher Performance

By Dana Neustadter, Richard Solomon, Gary Ruggles

Tags: Chip Design Insights, Interface IP, Silicon IP

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3 min read/Jun 10, 2024

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How PCIe 7.0 is Boosting Bandwidth for AI Chips

By Priyank Shukla, Gary Ruggles

Tags: AI & Machine Learning, Chip Design Insights, Interface IP, Silicon IP

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5 min read/May 08, 2024

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How ²ÝÁñÉçÇø IP and TSMC¡¯s N12e Process are Driving AIoT

By Hezi Saar

Tags: AI & Machine Learning, Chip Design Insights, Internet of Things, Interface IP, Silicon IP

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3 min read/Apr 25, 2024

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Want to Mix and Match Dies in a Single Package? UCIe Can Get You There

By Michael Posner, Manuel Mota

Tags: Multi-Die System, Chip Design Insights, Interface IP, Silicon IP

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4 min read/Mar 14, 2024

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With USB4 v2, Faster Speeds Is the Name of the Game

By Gervais Fong

Tags: Chip Design Insights, Interface IP, Consumer, Silicon IP

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5 min read/Mar 12, 2024

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Why Is Interoperability So Important for Ethernet Connectivity?

By Priyank Shukla, Madhumita Sanyal, John Swanson

Tags: Data Center, Chip Design Insights, Interface IP, Silicon IP

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6 min read/Feb 29, 2024

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Meeting the World¡¯s Growing Bandwidth Demands with a Complete 1.6T Ethernet IP Solution

By Priyank Shukla, John Swanson, Varun Agrawal, Jon Ames

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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4 min read/Jan 30, 2024

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XConn Revitalizes Next-Gen Data Centers with CXL 2.0 Switch Designed with ²ÝÁñÉçÇø IP

By Gary Ruggles

Tags: Data Center, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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7 min read/Jan 10, 2024

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How Secure DDR Interfaces Protect DRAM from Memory Attacks

By Dana Neustadter, Brett Murdock

Tags: Data Center, Chip Design Insights, Security IP, Interface IP, Silicon IP

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4 min read/Dec 14, 2023

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²ÝÁñÉçÇø and Intel Team Up on the First UCIe-Connected Chiplet-Based Test Chip

By Manuel Mota

Tags: Multi-Die System, Chip Design Insights, Interface IP, Silicon IP

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5 min read/Oct 26, 2023

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How OpenLight and ²ÝÁñÉçÇø Are Reimagining Data Centers Through Silicon Photonics

By Jigesh K. Patel, Keivan Javadi Khasraghi

Tags: Data Center, Chip Design Insights, Design, Interface IP, Photonic, Silicon IP

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7 min read/Aug 08, 2023

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How CXL Is Improving Latency in High-Performance Computing

By Richard Solomon, Gary Ruggles, Varun Agrawal

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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5 min read/Jun 27, 2023

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The Path to Faster Hyperscale Data Centers Starts with 224G Ethernet PHY IP

By John Swanson, Manmeet Walia

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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9 min read/Jun 16, 2023

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How to Maximize PCIe 6.0¡¯s Advantages with End-to-End PCIe Design ²ÝÁñÉçÇø

By Madhumita Sanyal, Gary Ruggles

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP, Verification

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5 min read/Apr 17, 2023

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Understanding UFS 4.0: The Latest Flash Storage Spec

By Dana Neustadter, LJ Chen

Tags: Chip Design Insights, 5G Wireless, Interface IP, Silicon IP, Verification

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4 min read/Apr 12, 2023

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Advancements in MIPI M-PHY Protocol & IP

By ²ÝÁñÉçÇø Editorial Staff

Tags: Interface IP, Silicon IP, Inside ²ÝÁñÉçÇø

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4 min read/Apr 11, 2023

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UCIe Standard: Benefits & Requirements Explained

By Manuel Mota

Tags: Multi-Die System, Chip Design Insights, Interface IP, Silicon IP

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6 min read/Apr 10, 2023

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Understanding MACsec Protocol for Ethernet Security

By Dana Neustadter

Tags: Chip Design Insights, Security IP, Interface IP, Silicon IP

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6 min read/Mar 02, 2023

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Reduce Integration Risks for High-Speed Applications with PCIe 5.0-Compliant ²ÝÁñÉçÇø IP

By Richard Solomon, Gary Ruggles

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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3 min read/Feb 21, 2023

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Keysight Validates PCIe 6.0 Specification's Speed

By Gary Ruggles

Tags: Customer Spotlight, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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5 min read/Feb 08, 2023

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How PCIe's TDISP Architecture Improves Interface Security

By Dana Neustadter, Richard Solomon

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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10 min read/Dec 19, 2022

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2022's EDA & Chip Design Advancements?

By ²ÝÁñÉçÇø Editorial Staff

Tags: Multi-Die System, AI & Machine Learning, Prototyping, Emulation, Interface IP, Inside ²ÝÁñÉçÇø, Cloud, Chip Design Insights, Design, Automotive, HPC, Data Center, Silicon IP, Verification

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6 min read/Dec 05, 2022

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How Post-Quantum Cryptography Impacts SoC Design?

By Ruud Derwig, Dana Neustadter, Sara Zafar Jafarzadeh

Tags: Chip Design Insights, Quantum Computing, Security IP, Interface IP, Silicon IP

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6 min read/Oct 24, 2022

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Advanced Protocol Standards Verification for SoC Designs?

By Vikas Gautam

Tags: Debug, Prototyping, Chip Design Insights, Emulation, Interface IP, Verification IP, Silicon IP, Verification

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5 min read/Oct 19, 2022

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Introducing USB 80Gbp: Specification & Protocol Explained?

By Morten Christiansen, Gervais Fong

Tags: Chip Design Insights, Interface IP, Silicon IP

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8 min read/Oct 04, 2022

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How Security for SoC Interfaces Enhances Data Protection?

By Michael Posner, Dana Neustadter, Hezi Saar

Tags: Data Center, Chip Design Insights, Security IP, Internet of Things, Interface IP, Automotive, Silicon IP

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1 min read/Sep 15, 2022

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Get the Most Out of Your Next-Generation PCIe 6.0.1 Design

By Richard Solomon

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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5 min read/Sep 05, 2022

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How CXL 3.0 Fuels Faster, More Efficient Data Center Performance

By Madhumita Sanyal, Richard Solomon, Gary Ruggles

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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6 min read/Jul 31, 2022

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How Universal Chiplet Interconnect Express Changes SoC Design?

By Manuel Mota

Tags: Chip Design Insights, Interface IP, Silicon IP

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4 min read/May 16, 2022

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Ensuring Software Compatibility Across Arm-Based Hardware?

By Ashutosh Varma

Tags: Chip Design Insights, Interface IP, Verification IP, Silicon IP, Verification

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6 min read/May 12, 2022

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²ÝÁñÉçÇø IP Passes PCIe 5.0 Compliance and Makes Integrators List

By Richard Solomon

Tags: AI & Machine Learning, Chip Design Insights, Interface IP, Silicon IP

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7 min read/Apr 26, 2022

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What's New in the PCIe 6.0 Specification: Bandwidth & Security?

By Dana Neustadter, Priyank Shukla, Gary Ruggles

Tags: AI & Machine Learning, Chip Design Insights, Internet of Things, Interface IP, HPC, Data Center, Silicon IP

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6 min read/Apr 19, 2022

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How Optical Interconnects Enable Data Center Disaggregation?

By Manmeet Walia, Manuel Mota

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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6 min read/Apr 06, 2022

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How to Integrate USB4 in Your Next SoC Design?

By Morten Christiansen

Tags: Chip Design Insights, 5G Wireless, Interface IP, Silicon IP

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6 min read/Mar 16, 2022

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What is Mobile Industry Processor Interface (MIPI) Protocol??

By Licinio Sousa

Tags: Chip Design Insights, Interface IP, Automotive, Silicon IP

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5 min read/Feb 23, 2022

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What are Co-Packaged Optics??

By Jigesh Patel, Priyank Shukla, Mitch Heins, Scott Durrant

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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8 min read/Feb 02, 2022

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How 800G Ethernet & Industry Standards Enable Innovation?

By Daniel Koehler, John Swanson

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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5 min read/Jan 25, 2022

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The PCIe 5.0 Standard is Here: IP, Designs & Applications?

By Gary Ruggles

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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5 min read/Jan 18, 2022

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System Interoperability's Impact on Hyperscale Data Centers?

By Priyank Shukla, Madhumita Sanyal

Tags: AI & Machine Learning, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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8 min read/Jan 03, 2022

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Enabling IoT Applications with Low-Power Design Techniques?

By Ron Lowman

Tags: Chip Design Insights, Security IP, Internet of Things, Interface IP, Energy-Efficient SoCs, Silicon IP

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4 min read/Nov 02, 2021

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Meeting Ethernet Bandwidth Demand: 1.6T Ethernet Standard?

By John Swanson, Anika Malhotra

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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6 min read/Oct 12, 2021

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Designing High-Bandwidth Memory Interfaces for HBM3?

By Vikas Gautam, Graham Allan

Tags: Memory, Chip Design Insights, Interface IP, Silicon IP

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5 min read/Sep 14, 2021

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High-Performance Computing Drives Demand for Chiplets

By Kenneth Larsen

Tags: Multi-Die System, Chip Design Insights, Design, Interface IP, HPC, Data Center, Silicon IP

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8 min read/Aug 16, 2021

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Silicon-Proven IP for SoC Design In HPC Applications

By Scott Durrant

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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5 min read/Aug 09, 2021

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What is a Multi-Die Chip Design?

By Kenneth Larsen, Manuel Mota

Tags: Multi-Die System, Chip Design Insights, Design, Interface IP, Silicon IP

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5 min read/Jul 27, 2021

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Enabling 800G Ethernet Bandwidth for Hyperscale Data Centers?

By Priyank Shukla, John Swanson, Anika Malhotra

Tags: AI & Machine Learning, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP, Verification

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4 min read/Jun 02, 2021

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Die-to-Die Interfaces for Data Centers Bandwidth & Latency?

By Manuel Mota

Tags: Multi-Die System, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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4 min read/May 25, 2021

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Faster Chiplet & SoC Design: Collaboration with Arm?

By Michael Posner, Neel Desai

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, 5G Wireless, Interface IP, HPC, Data Center, Silicon IP, Verification

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4 min read/Mar 24, 2021

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PCIe 6.0's Impact on High-Performance Computing ²ÝÁñÉçÇø?

By Priyank Shukla, Gary Ruggles

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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3 min read/Feb 16, 2021

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Next-Gen Ethernet Connectivity for Hyperscale Data Centers

By Priyank Shukla, Manmeet Walia

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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3 min read/Jan 26, 2021

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Hyperscale Data Center Security and Cloud Computing Platforms?

By Dana Neustadter

Tags: Data Center, Chip Design Insights, Security IP, Interface IP, Silicon IP

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4 min read/Jan 13, 2021

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5 Key Smart Technology Innovations?

By ²ÝÁñÉçÇø Editorial Staff

Tags: AI & Machine Learning, Emulation, 5G Wireless, Internet of Things, Interface IP, Virtual Prototyping, Cloud, Chip Design Insights, Design, Security IP, Automotive, Silicon IP, Verification

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4 min read/Oct 20, 2020

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Defining the AI Era with the IBM Research AI Hardware Center?

By Arun Venkatachar

Tags: Multi-Die System, AI & Machine Learning, Emulation, Interface IP, Virtual Prototyping, Chip Design Insights, Design, Manufacturing, Design Technology Co-Optimization, Processor ²ÝÁñÉçÇø, Silicon IP, Verification, 3DIC Compiler

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2 min read/Jul 12, 2018

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Global USB Trends: The Rise of Type-C Connections

By Eric Huang

Tags: Interface IP, Silicon IP

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1 min read/May 02, 2018

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USB Dual Role: The Evolution Beyond USB On-The-Go

By Eric Huang

Tags: Interface IP, Silicon IP

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3 min read/Mar 29, 2018

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Upstream and Downstream Ports: A Comprehensive Guide

By Scott Knowlton, Richard Solomon

Tags: Interface IP, Silicon IP

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2 min read/Mar 21, 2018

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Revolutionary Mobile Phone with USB Type-C and DisplayPort

By Eric Huang

Tags: Interface IP, Silicon IP

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2 min read/Dec 05, 2017

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USB 3.2 Cable Lengths and Innovative Water Delivery ²ÝÁñÉçÇø

By Eric Huang

Tags: Interface IP, Silicon IP

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2 min read/Nov 27, 2017

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Bit Error Rates in USB 3.2: A Detailed Analysis

By Eric Huang

Tags: Interface IP, Silicon IP

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2 min read/Nov 08, 2017

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USB Audio Device Class 3.0: A New Standard

By Eric Huang

Tags: Interface IP, Silicon IP

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2 min read/Oct 30, 2017

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USB 3.2 Primer: An Introduction to New Features

By ²ÝÁñÉçÇø Editorial Staff

Tags: Interface IP, Silicon IP

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2 min read/Sep 27, 2017

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USB 3.2 and Power Delivery: Insights from USB Developer Days 2017

By Eric Huang

Tags: Interface IP, Silicon IP

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2 min read/Aug 15, 2017

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PCIe 5.0: The Official Announcement and Its Implications

By Scott Knowlton, Richard Solomon

Tags: Interface IP, Silicon IP

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2 min read/Oct 13, 2016

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PCIe Bifurcation: A Basic Guide to Understanding

By Richard Solomon

Tags: Interface IP, Silicon IP

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3 min read/Apr 21, 2016

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Understanding Bandwidth: Back to Basics

By Richard Solomon

Tags: Interface IP, Silicon IP

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2 min read/Jul 08, 2015

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Samsung DDR4-3DS: Advanced 3D Stacked DIMMs Technology

By Graham Allan

Tags: Interface IP, Silicon IP

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3 min read/Jun 21, 2015

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USB in IoT: Evolving Connectivity

By Eric Huang

Tags: Internet of Things, Interface IP, Silicon IP

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2 min read/Mar 08, 2015

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Row Hammering: Security Risks and Prevention Methods

By Graham Allan

Tags: Interface IP, Silicon IP

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2 min read/Aug 24, 2014

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LPDDR4 Standard: A Speed Revolution by JEDEC

By Graham Allan

Tags: Interface IP, Silicon IP

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3 min read/Mar 08, 2014

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Embracing Change: The Impact of Technology Advancements

By Scott Knowlton, Richard Solomon

Tags: Interface IP, Silicon IP

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2 min read/Jan 09, 2014

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LPDDR3 vs. DDR3L: Understanding the Differences

By Graham Allan

Tags: Interface IP, Energy-Efficient SoCs, Silicon IP

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1 min read/Dec 15, 2012

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PCI Express with SR-IOV: A Virtual Approach to Network Efficiency

By Scott Knowlton

Tags: Interface IP, Silicon IP

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1 min read/Dec 05, 2012

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USB Video Class (UVC) Explained: Revolutionizing Video Transfer

By Eric Huang

Tags: Interface IP, Silicon IP

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2 min read/Oct 16, 2011

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UASP: Accelerating USB for Mass Storage

By Eric Huang

Tags: Interface IP, Silicon IP