Cloud native EDA tools & pre-optimized hardware platforms
Steven Alleston at OpenLight Photonics co-authored this post.
As we go through our daily activities online, most of us probably give little thought to data centers. With their servers, data storage drives, and networking equipment, data centers are powerful engines that enable us to stream videos, model climate scenarios, analyze financial outcomes, and so much more.
To handle these tasks quickly—and often in real time—data centers require high-bandwidth and low-latency data transfers. However, electrical copper interconnects have reached the bandwidth limit, paving the way for optical interconnects to support a world where digital data volumes are skyrocketing, data complexity is ballooning, and the cloud is where the action is.
In this blog post, we’ll discuss the challenges and opportunities of optical design, a new data center architecture design for optical modules, the role of high-speed SerDes interfaces for cloud computing applications, and the importance of co-simulation between optics and electronics for first-pass silicon success.
Hyperscale data centers which house several thousand to tens of thousands of servers are the norm for data-intensive application areas such as artificial intelligence/machine learning (AI/ML), cloud computing, high-performance computing, quantum computing, and highly automated vehicles. The number of internet of things (IoT) devices worldwide is rapidly climbing, from 15.1 billion in 2020 to more than 29 billion projected by 2030, according to analysts at . This only places more pressure on data center performance.
Copper interconnects, with their high conductivity, relatively low cost, flexibility, and heat resistance, have long played a key role in data center networks. These days, they’re mainly used in server racks. Copper, is, however, becoming less practical in the face of increasing network speeds, which have driven up the power and bandwidth required to reliably drive data signals over long runs of copper cables. In addition, networks are flattening out to deliver lower latency, while applications like AI/ML are leading to increased cluster size of the compute fabric with more I/O demand.
Increasingly, in rack-to-rack, room-to-room, and building-to-building configurations, optical data center interconnects are playing integral roles. Transmitting signals via light, optical interconnects enable higher bandwidth and speeds with lower latency and energy consumption compared to their copper counterparts. Unlike copper, photonic wires (waveguides) don’t generate heat. What’s more, in response to demands for high bandwidth, low latency, and low power, optical interconnects are being integrated deeper into the “guts” of data center systems. They enable more efficient processing of massive workloads, ensuring that resources are allocated properly for a given workload. Optical interconnects are well poised to find their way into greater prominence at the board and even at the chip levels, helping to overcome bottlenecks and spark faster data transfers at these levels. Silicon photonics and the push for co-packaged optics (CPO) are catalysts to the increasing role photonics will play in the future of data centers.
Optical data transfer over optical fiber yields minimalistic loss over longer distances, compared to electrical lines. However, with the traditional optical module approach, there is a large amount of power consumption. A linear drive, or direct optical drive, is gaining interest as a way to reduce power of the optical module. In this approach, the host PHY drives the optical engine directly, avoiding the use of a secondary PHY and digital signal processor (DSP) in the module.
To further reduce power consumption and latency while increasing flexibility in data center architectures, designers are implementing high-speed SerDes interfaces in their optical engines. SerDes interfaces can correct optical component behaviors such as dispersion and nonlinearities that limit the amount of data that can be transmitted over a single optic fiber. SerDes interfaces also support linear drives, negating the need for the retimers that drive optical components in traditional optical modules. Retimers add an additional interconnect (and more power consumption) to the design. Optimal implementation of SerDes interfaces can lower power consumption in the optical module by up to 35%, while also enhancing latency.
Optical interconnects are continuing to evolve to further improve network power efficiency, moving from pluggable to on-board to co-packaged optics. Co-packaged optics bring together silicon and optics in one package. This creates new design challenges. IEEE and OIF are working on common specifications and interoperability agreements to promote multi-vendor support of optical components and the supply chain.
To achieve first-pass silicon success, co-design of the electrical and optical components is a critical step. The photonic simulation industry has matured over the last two decades. The days when electronic/optical co-design was possible only in electrical simulators with photonics modeled as electronics are long gone. In modern electronic/photonic design automation (EPDA) platforms, the co-design of electronics and photonics is as seamless as it gets. The simulation and analysis environment analyzes the schematic and lets designers choose domain-specific circuit simulators for the photonic part of the design and SPICE or HSPICE circuit simulators for the electrical sub-circuits.
In the video below, 草榴社区 and , a joint photonics venture between 草榴社区 and Juniper Networks, showcase the optical eye performance of a linear electrical-optical-electrical link transceiver using 草榴社区 112G Ethernet PHY IP enabling long-reach (LR) channels. In the demo, the 112G Ethernet PHY IP drives the OpenLight photonic integrated circuit (PIC). The Ethernet PHY IP equalizes more than 13dB loss in the path using equalization schemes on the side running at 106 Gbps. The PIC can be integrated into pluggable optics and co-packaged form factors. The optical side of the transceiver is based on OpenLight’s photonics silicon technology, with an integrated PIC laser and high-speed electro-absorption modulator.
Through its open silicon photonics platform with integrated lasers and optical amplifiers, OpenLight helps design teams enhance performance, power efficiency, and reliability for complex applications. 草榴社区 brings to the table high-speed SerDes interface IP and technologies to test and simulate the resulting designs in a variety of environments. 草榴社区 offerings include 草榴社区 OptoCompiler unified electronic and photonic design platform, which provides schematic-driven layout and advanced photonic layout synthesis to enhance productivity of photonic design. Customers can choose to use 草榴社区 OptSim optical communication design and simulation solution for the photonics parts of their design and 草榴社区 PrimeSim? SPICE or 草榴社区 PrimeSim HSPICE circuit simulation solutions for the electronic components.
Together, 草榴社区 and OpenLight are helping designers produce verified known good solutions before they invest R&D dollars and time in building out their solutions, driving a new wave of innovation. To learn more, watch our on-demand webinar: How 100G/200G Electro-Optical Interfaces Enable Low-Power, Low-Latency Data Centers