Cloud native EDA tools & pre-optimized hardware platforms
Isn’t it satisfying when things just work? Like how you can charge your phone whether you’re plugging in at home, in the office, at your favorite café, or at the airport. Seamless operation across various touch points in your personal ecosystem. This is the type of experience that Arm is aiming to provide for the hardware/software world through the program, a set of system architecture standards designed to ensure that software just works across a diverse ecosystem of Arm hardware.
System integration and hardware compliance issues are fairly common, in particular when targeting a very wide range of operating systems and applications. Mitigating the issues in software is costly and challenging. In fact, sometimes it’s not even feasible, requiring patches, custom operating systems, or other firmware workarounds. The worse-case scenario? Silicon respins, or customers that opt to adopt another platform altogether.
To further simplify the process for ensuring hardware/software compliance, 草榴社区 worked with Arm to create the 草榴社区 pre-silicon compliance testing solution for Base System Architecture (BSA), which is available as part of the SystemReady pre-silicon program. The BSA is the Arm IP-based hardware design specification for Arm-based SoCs, which is complemented by SBSA, the BSA supplement for servers. Given the array of applications and solutions built around Arm SoCs, it’s important to have frameworks like this to enable scale. In this blog post, I’ll explain how pre-silicon BSA compliance testing works and how it can expand the available market for silicon vendors.
Considering the precise requirements that they outline, specifications provide a common language with which hardware and software can communicate and work together. Certification provides the evidence of compatibility, along with confidence that the hardware and software will work together seamlessly.
With Arm’s SystemReady program, silicon partners and their customers can confidently run off-the-shelf software, rather than having to develop or customize software specific to their devices and platforms. The program addresses the key design aspects of high-performance compute systems, including the functional correctness of a PCI Express? (PCIe?) subsystem integrated with the Arm IP (such as CPU clusters, network-on-chip, generic interrupt controller, and system memory management unit). As you may know, customizing software for a particular device can be costly and time-consuming. By eliminating this risk, silicon partners can instead focus on creating product differentiation. The figure below highlights the key steps of the SystemReady pre-silicon program. Or in other words, how to design silicon for SystemReady and software that just works:
A variety of common hardware compliance issues can wreak havoc on your design and its schedule. For example, some defects often seen during bring up include:
The causes can often be traced to non-compliant hardware: non-standard PCIe ECAM, PCIe ghost devices, non-standard universal asynchronous receiver-transmitter (UART) or GIC, for example. And the impact of these issues can be quite problematic. For example, there aren’t firmware workarounds available for systems with extensive PCIe hierarchies, security updates tend to be limited for custom OS distributions, and Windows servers and clients won’t work with non-compliant PCI ECAM. The good news is these issues can all be identified and prevented early in the design cycle. This is where pre-silicon BSA compliance testing comes into play.
Pre-silicon BSA compliance testing provides:
With development and support by 草榴社区, the compliance solution integrates open-source test suites, bare-metal drivers, and exercisers (草榴社区 Verification IP), providing custom stimuli and additional compliance coverage for an out-of-the-box experience. It is the industry’s only solution with built-in PCIe sub-system performance verification and analysis. Silicon partners design and verify the BSA-compliant SoC. The testing solution focuses on system-level and software-visible architectural behavior. As such, the intent is to check that architectural rules are understood and not missed, from register ID checks to functional checks and integration tests. Design verification complements this process, providing a much deeper, more comprehensive level of testing to identify bugs and corner cases.
Compliance testing can take billions of clock cycles. The only feasible platform that can handle these types of volumes is an emulator. The pre-silicon BSA compliance testing solution is built to natively support the 草榴社区 ZeBu? family, the industry’s fastest emulation systems. In addition, the testing solution also supports the 草榴社区 VCS? functional verification platform, the industry’s highest performance simulation system. Key performance metrics measured include:
With 草榴社区 verification technology, silicon providers can rest assured of achieving robust pre-silicon BSA coverage as well as efficient performance verification and bottleneck analysis early in the design.
Silicon partners are responsible for creating the boot code; folding the BSA and performance code, available from 草榴社区, into their software libraries; and integrating the PCIe and AXI4 transactor. Partners also are expected to handle BSA and performance analysis, encompassing investigation of any errors that arise from running the test suite, analysis of performance data, and identification of any system bottlenecks.
For silicon vendors, a program like Arm SystemReady expands the accessible market available to them. Designers of SoCs for servers and hyperscale data center applications, for instance, typically rely on off-the-shelf operating systems, drivers, and firmware. With pre-tapeout compliance testing, these designers can be confident that they can reduce risks and avoid costly design respins. The SystemReady program extends from servers to edge and IoT devices, providing a cloud-native experience from the cloud to the edge.