草榴社区

Why Attend

DesignCon is the premier high-speed communications and system design conference, offering industry-critical engineering education in the heart of electronics innovation — Silicon Valley.?Attend the event to network with 草榴社区’ experts and see several successful interoperability demonstrations of 草榴社区’ 224G Ethernet IP, PCIe 7.0, and USB4 in our partner booths. Don’t miss the panels on PCIe 7.0 and electro-optical interconnects with 草榴社区 and other industry experts.

 

Partner Demos

Terasignal and 草榴社区 demonstrate the world’s first optical diagnostic interoperability at 112Gbps for next-gen energy efficient interconnects 

  • Featuring 草榴社区’ 112G Ethernet PHY IP enabling an LPO module diagnostic with Terasignal’s ultra-low power, linear driver, a key milestone in enabling interoperability of LPO modules.
  • Schedule a demo here

Anritsu’s Booth #907

  • Featuring 草榴社区’ PCIe 7.0 PHY IP transmitter and receiver performance at 128 GT/s in an interoperability demonstration with Anrtisu's MP1900A MU196020A PAM4 PPG and Tektronix’ scope

Foxconn’s Booth #913

  • Featuring 草榴社区 224G PHY IP long-reach performance with Foxconn’s direct attach cable, showcasing feasibility for next-gen AI cluster links with passive copper cables

Keysight’s Booth #1039

  • Featuring 草榴社区’ USB4 v2 PHY IP (80G) PAM3 robust RX capabilities over Type-C cable with Keysight’s BERT
  • Featuring 草榴社区’ 224G PHY IP excellent transmitter performance at 224Gbps PAM-4 with Keysight’s real-time scope

Samtec’s Booth #1039

  • Featuring 草榴社区’ 224G PHY IP long-reach performance with high-margins using Samtec’s high density SiFly near-chip connector, showcasing feasibility long-reach 224Gbps links with cabled backplane topologies
  • Featuring 草榴社区’ PCIe 7.0 PHY IP showing excellent loopback performance using Samtec's NovaRay IO and 2m cable system for AI/ML and data center applications

Teledyne LeCroy’s Booth #513 

  • Featuring 草榴社区’ PCIe 7.0 IP PHY IP in an interop demonstration with Teledyne LeCroy's tools showcasing transmitter equalization, eye diagram generation and measurement of SNDR, jitter, TxFFE and other critical characterization tasks  

Yamaichi’s Booth #758

  • Featuring 草榴社区’ 224G PHY IP performance over a VSR channel with high margins using Yamaichi’s QSFP connector, showcasing feasibility for next-gen 224Gbps chip-to-module channels

 

Panel

PCI Express & PAM4: Balancing Silicon & Interconnect Interdependencies for 128 GT/s
Tuesday, January 28 ? 4:45 PM - 6:00 PM Pacific Time (US & Canada)

Join industry leaders from 草榴社区, Keysight, BitifEye, Amphenol, Samtec and Intel for an in-depth conversation focusing on the latest updates and changes to PCIe signaling and physical topologies, focusing on the PAM4 signaling in the PCIe 7.0 specification.

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Presentation

Linear Electro Optical Interfaces: What, Why, When & How?
Wednesday, January 29 ? 3:15 PM - 4:00 PM Pacific Time (US & Canada)

This session will introduce and explain linear electro-optical links, a rapidly growing E/O interface for the next-generation PCIe (6&7) and Ethernet standards (112G/224G) that not only saves overall system power but also reduces data path latency. 

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