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Curve Mask Data Preparation/Verification for High Fidelity Mask Manufacturing

Wednesday, September 11, 2024
9:15 a.m. CEST | 3:15 p.m. CST | 4:15 p.m. JST

Leading-edge semiconductor manufacturers have started using masks with curvilinear patterns for better yield enabled by ILT (Inverse Lithography Technology).  In addition, the mask industry is deploying Real Curve masks such as Bezier curves for data volume reduction as defined Semi-P49.  This presentation will explain the background of these technologies and discuss the impact on the data preparation and verification flow.

Accelerating Litho Pathfinding Through Simulation for Memory/Logic/Display

Wednesday, September 11, 2024
9:45 a.m. CEST | 3:45 p.m. CST | 4:45 p.m. JST

Rigorous simulations represent an invaluable tool for exploring patterning options and assessing their lithographic performance ¨C at any semiconductor device type and technology. Physics-based models help to predict the impact of process variations on the printed results on silicon wafers or glass substrates without running costly experiments.

A key contributor to successful simulations is the precise characterization of lithographic setup conditions. While exposure tool properties such as illumination and projection parameters are well described, mask absorber and wafer feature attributes are determined through electron beam metrology tools such as CD-SEMs.

In this presentation, we demonstrate the efficient use of contours extracted from SEM images to characterize mask or wafer features with respect to placement, pattern fidelity, and uniformity. Defects can be are automatically detected and categorized, and severity can be easily assessed by simulation.

The interaction between substrate and photoresist system as well the formation of 3D resist profiles is described by a multitude of different mechanisms, where metrology data is essential to determine the appropriate model parameters. We will use a wide range of examples to demonstrate the power of rigorous modeling, from resist reflow (i-line), via DUV sub-80nm pitch resolution challenges (ArF immersion), to metal oxide resist / underlayer systems (high NA EUV).

AI Applications, Benefits, and Future Opportunities

Wednesday, September 11, 2024
10:15 a.m. CEST | 4:15 p.m. CST | 5:15 p.m. JST

Artificial intelligence (AI) has been spreading rapidly across industries in recent years. Its influence in the semiconductor industry is also increasing, replacing many technical steps in areas from design to manufacturing with improved accuracy and performance. One recent trend in the era of AI is the saturation of AI models and the increasing importance of data. Over the past few years, superb AI models have been developed and their impact has grown, but on the other hand, new models have appeared less and less frequently. Now the focus is shifting from the model to the data, and the amount of data and its proper representation are becoming more and more important. What differentiates ²ÝÁñÉçÇø AI from competitors is in this perspective. First, we have large data from different areas including design, TCAD, and lithography, which are closely related to each other in terms of optimizing their costs and runtime. Second, the physics of each domain is reflected to the representation of the data with proper featurization. As a result, the AI models trained with the data will become more robust in both training and inference. Furthermore, this aspect will accelerate the development of a large generative AI model that spans both design and lithography space of the large data, which can be applied to any specific cases with or without fine tuning. Finally, when this large generative model is combined with other kinds of AI technologies that are being developed in ²ÝÁñÉçÇø, which include optimization AI and generative AI for language data, more significant enhancements will be attainable in terms of productivity.