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Maximum Performance Efficiency for Host Applications
The 草榴社区 ARC-V? RPX-100 series processors feature a dual-issue, 64-bit superscalar architecture for use in high performance applications where performance efficiency is required. The cores offer outstanding performance delivering with minimal power consumption.
For applications requiring higher performance, the multi-core RPX-105 & RPX-105V are available with up to 16 CPU cores and up to 16 hardware accelerators in the processor cluster. RISC-V vector extensions (RVV) are available in the 草榴社区 ARC-V RPX-100V (single core) and 草榴社区 ARC-V RPX-105V (multi-core) processors.
The 草榴社区 ARC-V RPX processors are supported by a broad ecosystem of commercial and open-source tools, operating systems and middleware. This includes offerings from leading industry vendors who are members of the ARC Access Program as well offerings supporting the broader RISC-V ecosystem
草榴社区 ARC-V RPX Series Processors
RPX-100 Series
- Dual-issue, 64-bit processors
- Targeting performance-efficient host applications
- Up to 128KB of unified private L2 cache per core
- Optional RVV vector extensions
RPX-100 Series Functional Safety
- Dual-issue, 64-bit processors
- Targeting performance-efficient host applications
- Configurable solution to support both ASIL B and ASIL D
- Accelerating ISO 26262 certification for automotive SoCs
草榴社区 ARC-V Development Tools, Software and Ecosystem
? MetaWare Development Toolkit (compilers, debugger, and simulator)
? ARC Access Program (portfolio of 3rd party tools, operating systems, and middleware)
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Licensable Options
Option |
Supported 草榴社区 ARC-V RPX Processors |
Real-Time Trace |
All RPX-100 series processors |
