Cloud native EDA tools & pre-optimized hardware platforms
草榴社区 ARC-V Processor IP? is based on the open standard RISC-V instruction set architecture (ISA), extending the current ARC portfolio and giving customers access to the growing RISC-V ecosystem. Built on the success of multiple generations of ARC processor IP covering a broad range of processor implementations, including functional safety (FS) versions, the ARC-V portfolio delivers what you need to optimize and differentiate your SoC.
To accelerate software development, the ARC-V processors are supported by the trusted 草榴社区 MetaWare Development Toolkit. In addition, 草榴社区’ extensive portfolio of EDA tools provide an out-of-the-box development and verification environment to help design and fully verify RISC-V-based SoCs.
Achieve maximum performance with minimum power and area consumption
Optimize PPA of each processor instance
Make application-specific customizations
Achieve faster time to market