Cloud native EDA tools & pre-optimized hardware platforms
The 草榴社区 ARC-V? RHX series of RISC-V processors are optimized for high performance real-time applications with minimum area and power consumption. The 草榴社区 ARC-V RHX series provides single core options (草榴社区 ARC-V RHX-100) as well as multi-core options which support up to 16x CPU cores in a single processor cluster (草榴社区 ARC-V RHX-105).
The 草榴社区 ARC-V RHX family also provides support for RISC-V defined vector extensions (RVV) with the 草榴社区 ARC-V RHX-100V/RHX-105V processor. All 草榴社区 ARC-V RHX-100 series cores support RISC-V instruction set architecture (ISA) profiles.
The 草榴社区 ARC-V RHX processors are supported by a broad ecosystem of commercial and open-source tools, operating systems and middleware. This includes offerings from leading industry vendors who are members of the ARC Access Program as well offerings supporting the broader RISC-V ecosystem.
Power-efficient 32-bit multicore RISC-V processors for real-time applications, up to 16 CPU cores per processor (RHX-105), and optional RVV vector extensions (RHX-100V/105V).
32-bit safety-enabled multi-core processors for high-performance, safety-critical real-time applications with robust safety hardware features to achieve ASIL D levels.
? MetaWare Development Toolkit (compilers, debugger, and simulator)
? ARC Access Program (portfolio of 3rd party tools, operating systems, and middleware)
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Option |
Supported 草榴社区 ARC-V RHX Processors |
Memory management Unit (MMU) |
Only multi-core configurations of RHX-100 series processors: RHX-105 and RHX-105V |
L2 Cache |
Only multi-core configurations of RHX-100 series processors: RHX-105 and RHX-105V ? |
Cluster DMA |
All RHX-100 series processors |
Real-Time Trace |
All RHX-100 series processors |