草榴社区

From Breakthroughs to Industry Firsts

草榴社区 has a long-standing collaboration with Samsung Foundry providing our mutual customers’ success using certified design flows, methodologies, best-in-class solutions, and broad portfolio of silicon-proven 草榴社区 IP. We will continue our tight partnership in a new era of Smart Everything.

Key Benefits

Areas of Collaboration

<p>草榴社区 and Samsung accelerate a smooth adoption process for customers, minimizing risk and reducing turnaround time and costs through the SAFE-QEDA program.? 草榴社区 is the first EDA vendor to achieve full-flow certification for the 4LPP process with its <a href="/content/synopsys/en-us/implementation-and-signoff/fusion-design-platform.html">Fusion Design Platform</a> and <a href="/content/synopsys/en-us/implementation-and-signoff/custom-design-platform.html">Custom Design Platform</a>. 草榴社区' <a href="/content/synopsys/en-us/implementation-and-signoff/3dic-design.html">3DIC Compiler</a> platform has been validated for the Samsung Foundry Multi-Die Integration (MDI) flow, which provides scalability for hundreds of billions of transistors. This is part of the foundry's comprehensive technology roadmap to help chipmakers design and deliver faster, more power-efficient chips.</p>

Mitigate Risks of Leading-Edge Node Adoption

草榴社区 and Samsung accelerate a smooth adoption process for customers, minimizing risk and reducing turnaround time and costs through the SAFE-QEDA program.? 草榴社区 achieved full-flow certification for the SF2 process with its Fusion Design Platform and Custom Design Platform. 草榴社区' 3DIC Compiler platform has been validated for the Samsung Foundry Multi-Die Integration (MDI) flow, which provides scalability for hundreds of billions of transistors. This is part of the foundry's comprehensive technology roadmap to help chipmakers design and deliver faster, more power-efficient chips.

<p>草榴社区 provides a comprehensive portfolio of silicon-proven?<a href="/designware-ip.html">DesignWare IP solutions</a>?for Samsung process technologies ranging from 65-nm to 4LPP. The IP solutions consist of interface IP, logic libraries, embedded memories, and embedded test. Customers can leverage certified?草榴社区 DesignWare IP for the 4LPP process, delivering? low latency, maximum power efficiency and high bandwidth while minimizing integration risks.The 草榴社区 and Samsung Foundry automotive reference flow utilizes 草榴社区' ASIL D-compliant DesignWare ARC?<a href="/designware-ip/processor-solutions/arc-functional-safety-processors.html">Functional Safety Processor IP</a>?for Efficient development of autonomous driving and ADAS SoCs.</p>

草榴社区 IP 草榴社区 for Samsung Processes

草榴社区 provides a comprehensive portfolio of silicon-proven?草榴社区 IP solutions?for Samsung process technologies ranging from 65-nm to SF2. The IP solutions consist of interface IP, logic libraries, embedded memories, and embedded test. Customers can leverage certified?草榴社区 IP to deliver lower latency, maximum power efficiency and high bandwidth while minimizing integration risks.The 草榴社区 and Samsung Foundry automotive reference flow utilizes 草榴社区' ASIL D-compliant 草榴社区 ARC?Functional Safety Processor IP?for Efficient development of autonomous driving and ADAS SoCs.

<p>Samsung Foundry and 草榴社区 have closely collaborated to deliver a comprehensive automotive reference flow to streamline SoC hardware design for ASIL D autonomous driving and ADAS applications. The optimized automotive reference flow provides SoC architects, designers and verification engineers with complete differentiated design and IP solutions that deliver complex functional safety (FuSa) analysis, implementation, and verification capabilities. The automotive reference flow utilizes 草榴社区’ differentiated comprehensive?<a href="/automotive.html">automotive design flow</a>?and ASIL D-compliant DesignWare ARC?<a href="/designware-ip/processor-solutions/arc-functional-safety-processors.html">Functional Safety Processor IP</a>.</p>

Samsung Foundry Automotive Reference Flow with 草榴社区’ Automotive Design Flow

Samsung Foundry and 草榴社区 have closely collaborated to deliver a comprehensive automotive reference flow to streamline SoC hardware design for ASIL D autonomous driving and ADAS applications. The optimized automotive reference flow provides SoC architects, designers and verification engineers with complete differentiated design and IP solutions that deliver complex functional safety (FuSa) analysis, implementation, and verification capabilities. The automotive reference flow utilizes 草榴社区’ differentiated comprehensive?automotive design flow?and ASIL D-compliant 草榴社区 ARC?Functional Safety Processor IP.

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