Cloud native EDA tools & pre-optimized hardware platforms
The massive compute demands of hyperscale data centers – a backbone of the new pervasive intelligence era – require significantly faster Ethernet speeds to enable emerging workloads of large language models, HPC simulation and AI training. To create the industry’s fastest chips for AI and data center networking applications, 草榴社区 delivers a complete IP solution for 1.6T Ethernet. The solution, including multi-rate, multi-channel 1.6T Ethernet MAC and PCS Controllers, silicon-proven 224G Ethernet PHY IP, and industry leading verification IP, helps design teams reduce integration risk and accelerate time-to-market.
Supports IEEE 802.3, OIF-224G and OIF-112G standards electrical specifications
Meets the performance requirements of chip-to-chip, chip-to-module, and long reach copper/ backplane interconnects
DAC-based PAM-4 transmitter includes feed-forward equalization (FFE)
Digital-based receiver consists of analog front-end (AFE), ADC, and advanced digital signal processor (DSP)
High-performance receiver equalization supports channel loss of 45dB
Low jitter phase-locked loops (PLLs) provide robust timing recovery and better jitter performance
Includes Ethernet PCS RS-FEC functions
Our comprehensive portfolio for 1.6T Ethernet provides the advanced IP and resources you need to achieve silicon-success.
Deliver 1.6T Ethernet SoCs for server, networking, storage, visual computing, edge infrastructure, and AI applications with the broadest portfolio of high-performance, low-latency & power-efficient IP for the most advanced process nodes.
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