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When you gather a group of bright semiconductor folks in the middle of San Francisco and ask them what¡¯s the biggest future challenge they¡¯ll face, you¡¯re bound to get a bunch of interesting answers. That was the case at a recent AI-themed panel hosted by Renesas outside the Moscone Center on the edges of SEMICON West.  

Thoughts ranged widely. There was Advantest¡¯s Ira Leventhal, citing the challenge of getting semiconductor industry players to share more design data so everyone can learn faster¡ªsomething of a nirvana situation which may, or may not, ever be possible. Sailesh Chittipeddi from Renesas talked about the need to optimize the power efficiency of complex AI applications to radically reduce the amount of energy consumed. And ²ÝÁñÉçÇø¡¯ own Shankar Krishnamoorthy considered the cost of increased chip design complexity and how generative AI (GenAI) could have a major positive impact on the electronic design automation (EDA) industry over the next five years.

The Panel: From TinyML to Major Multinationals 

• Advantest: Ira Leventhal, vice president, US Applied Research and Technology
• Renesas: Dr. Sailesh Chittipeddi, executive vice president, general manager of Embedded Processing, Digital Power and Signal Chain ²ÝÁñÉçÇø Group
• ²ÝÁñÉçÇø: Shankar Krishnamoorthy, general manager, EDA Group
• TinyML: Evgeni Gousev, chairman of TinyML Foundation
• Gartner: Gaurav Gupta, panel moderator and vice president, Emerging Technologies and Trends, Semiconductors and Electronics  

Getting Into Details: Driving Innovation and Creating Value Across the Semiconductor Industry and Beyond

Krishnamoorthy started talking as a musician played Elton John¡¯s ¡°Tiny Dancer¡± on the street below. No tiny dancers on the panel but Krishnamoorthy was next to Evgeni Gousev from the TinyML Foundation. TinyML focuses on the deployment of AI on edge devices using inference techniques to create actionable insights locally. Chittipeddi noted that 75% of all data now comes from edge devices and with the quantity of data being crunched at the edge, and everywhere else, the semiconductor sector is racing towards becoming the first trillion-dollar industry.  

But with great growth comes even greater responsibility. The obvious challenges are oft discussed: is AI good or bad, what about data security and privacy, and how about the cloud¡¯s growing energy footprint¡ªespecially as heavy-duty workloads like ChatGPT become pervasive? But one key issue isn¡¯t quite so mainstream, and that¡¯s where Krishnamoorthy focused as he described the challenges of rapidly rising chip design complexity: ¡°Increasing productivity is crucial, as the cost of migrating complex chip designs to more advanced nodes has more than doubled in recent years while engineering staffing shortages have only grown more acute,¡± he explained. ¡°With 4x more work for engineering teams and a 10%-20% talent gap, AI-driven EDA tools are now a top priority for semiconductor companies.¡± 
 
Krishnamoorthy¡¯s point was that chip design becomes exponentially harder as transistors get ever smaller and that complexity is demanding more engineering resources than the industry can possibly provide. It¡¯s the perfect use case for AI to help us design more AI.  Leventhal was even more bullish, suggesting AI-powered tools will soon be ¡°fundamental¡± for chip design to boost engineers¡¯ productivity. Going even further, Leventhal proposed semiconductor companies should share AI-generated design data ¨C something that today they would never do. Making such an initiative possible would require companies to pool data on shared challenges in a secure way; each company would be able to gain insights from the new ecosystem data lake without any contributor accidentally giving away their secret sauce. It's theoretically possible, and the prospect is truly exciting.

Building a Sustainable Intelligent Edge with Lower-Energy Silicon

Sustainability was another hot topic for panel participants, with Chittipeddi talking about how performing more data processing at the edge was critical to balancing the load on the cloud. The reason being that cloud-based processing is far more energy-intensive overall due to the energy tax of moving data. The solution cuts across silicon and software. 

For software, Chittipeddi said AI developers must step up their ability to prune machine learning (ML) algorithms and models, enabling them to run more efficiently on purpose-built silicon such as low-power neural processing units (NPUs). Gousev continued the thread, stating that the ability to run workloads at the edge on tiny (often battery-operated) devices and drill for data had to be done with privacy in mind.

He quoted one local company seeing huge growth due to their development of specialized sensors and algorithms capable of obscuring faces and other identifiable information. This has opened opportunities to put cameras in sensitive areas such as restrooms to detect problems--for example, someone who had collapsed--without identifying the person. Now, while these edge devices run highly optimized ML models, emphasized Gousev, the software was fully reliant on the amount of processing power available. That brought us right back to chip design, and how AI could optimize the design of AI. 
 
As ²ÝÁñÉçÇø¡¯ Krishnamoorthy told the audience, low-power chips (or any chips) are best designed with AI-driven EDA tools. He evidenced that with figures ²ÝÁñÉçÇø was seeing with its ²ÝÁñÉçÇø.ai? EDA solutions being used by designers to customize and differentiate silicon. ¡°We use AI to optimize AI, which is a great way to achieve 15% energy and power savings,¡± especially for edge devices.