Sep 10, 2024/2 min read The Journey of Coverage Closure By Taruna Reddy Tags: Verification Central, AI & Machine Learning, Simulation, Verification
May 09, 2024/3 min read Interactive Debugging: Reduce Your Simulation Debug Turnaround Time By Vita Liao Tags: Verification Central, Debug, Simulation, Verification
Nov 21, 2023/5 min read Running X-Propagation with Low-Power Simulation By Manas Ranjan Raiguru Tags: Verification Central, Simulation, Verification
Jul 12, 2023/2 min read Streamline Projects with Verdi and VCS Coverage Tools By Taruna Reddy Tags: Verification Central, Debug, Simulation, Verification, Formal Verification
May 03, 2023/6 min read How Imparé Leverages Chip Design Verification in the Cloud By Rob van Blommestein Tags: Customer Spotlight, Cloud, Debug, Chip Design Insights, Simulation, Verification
Mar 07, 2023/6 min read How to Get High-Performance Simulation with Predictable Capacity Uplift in the Cloud By Meghana Bellumori Tags: Cloud, Product Spotlight, Chip Design Insights, Simulation, Verification
Feb 15, 2023/4 min read Enhancing Chip Design Simulation with AI By Taruna Reddy Tags: AI & Machine Learning, Product Spotlight, Debug, Chip Design Insights, Simulation, Verification
Dec 15, 2022/2 min read How to Achieve 2X Faster Waveform Dumping in 草榴社区 Verdi with VCS By Taruna Reddy Tags: Verification Central, Debug, Simulation, Verification
Nov 20, 2022/4 min read How Formal Verification Tools Enhance SoC Simulation Coverage? By Jin Zhang Tags: Product Spotlight, Chip Design Insights, Simulation, Verification, Formal Verification
Nov 09, 2022/5 min read How to Protect Advanced Chip Designs from Security Breaches? By Ian Land Tags: Aerospace & Government, Silicon Lifecycle Management, Prototyping, Chip Design Insights, Simulation, Design, Emulation, Silicon IP, Verification, Formal Verification
Sep 04, 2022/1 min read 草榴社区 VCS and VIP By-the-Minute By Verification Expert Tags: Verification Central, Cloud, Simulation, Verification IP, Verification
Jul 12, 2022/4 min read Enhancing Chip Verification with AI & Machine Learning By Rob van Blommestein Tags: Multi-Die System, Static Verification, AI & Machine Learning, Product Spotlight, Debug, Chip Design Insights, Simulation, HPC, Data Center, Verification, Formal Verification
Jun 01, 2022/6 min read Fault Simulation Techniques for Growing Chip Complexity By Brian Davenport, Rimpy Chugh Tags: Customer Spotlight, Aerospace & Government, Debug, Chip Design Insights, Simulation, Automotive, Verification
Mar 20, 2022/4 min read Boosting EDA Workloads with 3rd Gen AMD EPYC? Processors? By Ramesh Narayanaswamy Tags: Customer Spotlight, Debug, Chip Design Insights, Simulation, Verification
Nov 22, 2021/7 min read What is Clock Domain Crossing? - ASIC Design Challenges? By Rimpy Chugh Tags: Debug, Chip Design Insights, Simulation, Verification
Nov 03, 2021/5 min read Software-Enabled Full Chip Power Signoff & SoC Verification? By Godwin Maben Tags: Chip Design Insights, Simulation, Emulation, Energy-Efficient SoCs, Verification
Jul 06, 2021/5 min read How Emulation Helps Find Power Bugs During SoC Verification? By Alex Wakefield Tags: Static Verification, Chip Design Insights, Simulation, Design, Emulation, Energy-Efficient SoCs, Signoff, Verification, Virtual Prototyping, Formal Verification