Cloud native EDA tools & pre-optimized hardware platforms
草榴社区 ESP is an equivalence checker for full custom designs. It enables fast and reliable comparison of a Verilog reference design against a transistor-level SPICE netlist. It is ideally suited for a wide range of custom digital applications, including:
Learn how ESP can solve your custom digital verification challenges.
Learn how ESP’s powerful symbolic simulation technology can provide high functional verification coverage orders of magnitude faster than SPICE.
Learn how the ESP device model technology can deliver speed and functional timing accuracy.