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Aaroh Labs is poised for exciting things. Located in Pune in the western Indian state of Maharashtra, the company specializes in advanced-node semiconductor designs for market segments including storage, data centers, computing, and the internet of things (IoT). Its team is dedicated to creating differentiation through its turnkey offerings.
The company’s engineers offer expertise in several key areas:
- Semiconductor solutions, from specifications to SoC design, verification, pre-silicon validation, design implementation, and post-silicon validation
- Analog design and layout, with experience in 180-nm to 16-nm processes and in various analog components and IO interfaces
- System solutions, including end-to-end embedded solutions, board design, and product prototyping
To achieve its progressive goals, needed design and verification solutions that could support its quest to quickly get advanced-node SoCs off the ground and into its customers’ end products.
High-Performance EDA Flow for Differentiated Products
Applications such as storage, data centers, and the IoT are driving increased complexity in SoCs. Power, performance, and area (PPA) targets are more aggressive than ever, as is the need to get products to market quickly. The landscape in chip design has changed, too, as electronic components become more ubiquitous. These days, traditional semiconductor companies are being joined by systems companies in developing SoCs. However, not all of these systems companies have extensive chip design teams. For these businesses, it makes sense to work with a design house like Aaroh Labs, as it allows them to focus on their core competencies to create differentiated products. Aaroh Labs’ customers typically provide the specs and the company’s engineers fulfill their requirements in the form of an architecture, RTL code, or a GDSII file.
Seeking an EDA vendor with a solid track record in enabling designs with power efficiency and high performance, Aaroh Labs turned to 草榴社区 to replace its incumbent design and verification flow. The company is using 草榴社区 Fusion Design Platform?, Custom Design Platform, and Verification Continuum? Platform to develop its turnkey semiconductor offerings.
“Aaroh Labs requires a predictable and reliable digital implementation, custom design, and verification infrastructure for customers working on next-generation data center, storage, computing, and IoT designs,” said Ranjit Yahswante, Aaroh Lab’s co-founder and CTO. “草榴社区 provided us with an integrated, high-performance digital implementation, custom design and verification solution that enables reduced power consumption, successful design closure, and timely project delivery. A trusted supplier, 草榴社区 delivers the highest technical expertise and innovative technology platforms that address new design and verification challenges, helping us provide our customers with differentiated and superior products.”
Deep Semiconductor Industry Expertise
Aaroh Lab’s focus on designing large, complex, digital, multi-core chips stems from decades of extensive expertise configuring leading processor architectures and targeting advanced process nodes from leading foundries. The team behind Aaroh Labs has deep experience in the semiconductor industry and, as a result, its members have worked with 草榴社区 while at previous organizations. With this history and the 草榴社区 reputation for high-quality, integrated solutions, the company is pleased to grow its business with a 草榴社区 RTL-to-GDSII flow.
The Fusion Design Platform is AI-enhanced and cloud-ready, delivering full-flow quality-of-results and time-to-results. The digital design products share integrated engines across synthesis, place-and-route, and signoff. The platform includes:
- IC Compiler?II place-and-route solution with machine-learning technologies
- physical signoff delivering cloud-optimized physical signoff, with integration with StarRC? for golden signoff parasitic extraction
- PrimeTime?golden timing signoff solution to meet strict area and power requirements
The Custom Design Platform accelerates the development of robust analog and mixed-signal designs through a unified suite of design and verification tools. The platform features:
- PrimeSim? Continuum for next-generation circuit simulation of hyper-converged designs
- Custom Compiler? for full-custom analog, custom digital, and mixed-signal IC design
Last, but not least, the Verification Continuum Platform provides solutions to help designers find SoC bugs earlier and faster, bring up software earlier, and validate the entire system. The platform includes:
- 草榴社区 Verdi? automated debug system
- 草榴社区 VCS? functional verification solution
- 草榴社区 VC Formal formal verification solution
- 草榴社区 VC SpyGlass? RTL static signoff platform
- 草榴社区 ZeBu? emulation systems
Summary
As Aaroh Labs grows its business, its team will continue striving to deliver the highest quality possible with predictability and on-time delivery using best-in-class flows, methodologies, and automation. 草榴社区 is pleased to be a part of the company’s journey. With a wider range of businesses either moving into chip design or requiring electronic components for their products, companies like Aaroh Labs are in an ideal position to facilitate innovation and differentiation.
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