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Because there are 4 types of checks, there are different data flows depending on the check. The most fundamental piece in PERC is the ¡°Netlist Analysis Engine.¡± The module runs first in all flow, and it is the programmable piece giving the name PERC. In this stage, a netlist is read in and analyzed for anything that a customer may want to know about their netlist. That can result in errors being reported or feed subsequent modules, depending on the type of check.

This is illustrated below with a simple block diagram:

Because PERC is a programmable solution, it has broad usage and applications. Anything a designer wants to know about a netlist and the corresponding shapes can be programmed.

There are a number of ways to partition the problem space. The most common is between ESD and non-ESD applications.

ESD applications do represent a significant percentage of PERC usage. For ESD checking, all 4 types of checks (netlist, netlist driven layout, current density and point to point resistance) come into play. The netlist checks confirm the existence of the ESD protection circuitry and can be run on the schematic or the extracted layout netlist. The netlist driven layout, current density and point to point resistance all require layout. Current density and point to point resistance also leverage StarRC for the R-extraction.

²ÝÁñÉçÇø¡¯ IC Validator physical verification is a comprehensive signoff solution, including design rule checking (DRC), layout versus schematic (LVS), fill capabilities and more.