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IP for Connected Vehicle and Infotainment
Infotainment SoCs supporting real-time multimedia networks and incorporating the latest interface IP standards and protocols in emerging automotive operating systems require a broad, high-quality IP portfolio for automotive applications. 草榴社区 offers USB, LPDDR4, HDMI, MIPI, PCI Express?, mobile storage, security, data converters, logic libraries, embedded memories, Sensor and Control IP Subsystem, and ARC? Processors to speed connected vehicle and infotainment SoC development in the latest 28-nm and 16/14-nm FinFET process technologies.
草榴社区 also offers Ethernet IP that supports Time Sensitive Networking (TSN) standards and enables predictable and reliable networks for functional safety ADAS applications.
Highlights
- USB4 IP offers the features in the USB4 specification, including Type-C connectivity and support for DisplayPort 1.4a TX, PCI Express, and Thunderbolt 3, with controllers, routers, PHYs, and verification IP
- Low latency, multi-port LPDDR4 controller and PHY supporting speeds up to 3200 Mbps for multi-port access to shared main memory
- Configurable Ethernet QoS controller optimized for low latency and high-performance automotive applications requiring audio video bridging including the new Time Sensitive Networking (TSN) standards
- MIPI display IP offers integrated C-PHY/D-PHY IP supporting speeds up to 24 Gbps and MIPI DSI/DSI-2 controllers
- MIPI I3C controller, compliant with the latest MIPI I3C specification, supports all data rates up to 33.4 Mbps with in-band interrupts within the 2-wire interface
- UFS host controller provides high-throughput, low-power, low-latency embedded and removable storage
- HDMI controller and PHY, compliant with the latest HDMI 2.1 specification, deliver the highest digital video & audio experience
- HPC Design Kit with embedded memories optimized for SoC processors: CPU, GPU and DSP are designed for demanding electro migration conditions
- STAR Memory System offers ECC support for multi-bit error correction.
- Security IP for HDCP 2.2 offers increased content protection
- Sensor & Control IP Subsystem optimized to process data from digital and analog sensors and offload host processors to enable more power-efficient processing of the sensor data is implemented using 草榴社区’ 32-bit ARC EM processor
- ARC EV Vision Processors offer multicore architecture for fast, accurate object detection, classification and scene segmentation by implementing deep neural networks (DNNs) with OpenCV and OpenVX software programming environment
- ARC EM, HS, and EV Functional Safety Processor IP supports ISO 26262 functional safety applications with integrated hardware safety features
- PCI Express? controllers and PHY are optimized for power, performance, latency and area with data protection and reliability features
- 12-bit SAR ADC offers high resolution up to 12-bit, 320MSPS ADC/DAC converters with high dynamic range and high speed for extended application range