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With the horsepower to simultaneously perform as many as a million computations, quantum computers help solve some of the world’s heftiest and most complex problems. How can a pharmaceutical company assess potential drug interactions that a drug under development might encounter? How can a trucking company plan its most efficient routes? How can an investment firm best balance risk and growth in its portfolio? From science and medicine to logistics, finance, and AI, the application areas that can benefit from this level of computational prowess stand to be transformed.
Even blazingly fast supercomputers, which in their own right are positively impacting a variety of industries, aren’t quite a match. Supercomputers must analyze combinations of problems sequentially rather than in parallel format. In 2019, —158 million times faster than the world’s most powerful supercomputer. And last June, , which earned a score of 64 on the quantum volume measure (a gauge of the machine’s qubits and how well it uses them).
The guts inside supercomputers and quantum computers are simply different. —something that classical supercomputers are not designed to do. For quantum computing, it’s all about efficient qubit/system scaling. What are qubits…and what enables this scaling? In this blog post, we’ll cover these essentials and explain how advanced cryogenic semiconductor IP provide fuel that can turbo-charge quantum computers.
Scaling Quantum Computing Designs
Traditional computers are about zeros and ones, the binary bits that store information. Quantum computers, on the other hand, use quantum bits, or qubits. Qubits store data in a state of superposition, meaning they can be zero, one, or a hybrid of both at the same time (thanks to the nature of quantum physics). Since each individual qubit can occupy a continuum of states representing an infinite number of values, a qubit possesses the powerful capability of processing information in parallel.
Now, what enables efficient qubit/system scaling? Quantum computing components typically operate at cryogenic temperatures—that’s in the neighborhood of zero Kelvin (-273.15 °C). However, it’s challenging to find control circuitry that can run at such extremely cold temperatures. In current architectures, the control circuitry is located remotely from the qubit, with bulky and costly cabling providing the connectivity. This arrangement protects the circuitry from the cryogenic temperatures. However, the amount of cabling needed for the qubits hampers scaling, not to mention latency.
What’s needed to break through the barriers created by this extreme temperature challenge?
If the control electronics could somehow be co-located with the qubits in the cryostat, the device that maintains these ultra-low temperatures, that could be a solution. But since there’s very limited real estate in the cryostat, the control circuitry would have to be miniaturized for this approach to be feasible. What’s more, today’s semiconductors are only qualified to work down to -40° C.
Accelerating Development of Cryo-CMOS IP
Under temperatures that are close to absolute zero, transistor behavior changes dramatically, so these altered operating characteristics need to be well understood and modeled. sureCore, a U.K.-based developer of power-efficient embedded IP, is on the case. The company was recently awarded a ?6.5 million grant by Innovate UK to lead a seven-member consortium to , with the goal of enhancing qubit/system scaling for quantum computing applications. The idea is that this cryo-CMOS IP, which will eventually be available via license, will enable the development of custom chips that can interface to qubits at cryogenic temperatures to support controller functionality. Working individually, such an effort could take many years. Collaborating as a team, the consortium anticipates achieving results in less than three years.
Each member of the consortium plays an essential role in the cryo-CMOS IP ecosystem:
- SemiWise and the quantum computing research group at the University of Glasgow are modeling how transistors work at cryogenic temperatures. SemiWise will use the measurements and simulation data to re-center the foundry process design kit (PDK) for these ultra-low temperatures and to enable cryogenic circuit design.
- 草榴社区 will take the data generated from the modeling work to refine its Sentaurus? TCAD (technology computer-aided design) tools. The Sentaurus TCAD framework, along with TCAD-to-SPICE tools, will facilitate design technology co-optimization for cryo-CMOS designs, helping designers optimize power, performance, area, and yield.
- Aside from leading the consortium, sureCore is undertaking the memory design and exploiting its low-power technology to minimize power dissipation so that the thermal load on the chamber is reduced.
- Oxford Instruments, which manufactures cryogenic systems, is providing the chamber expertise.
- Representing end user needs, Universal Quantum and SEEQC will determine what IP blocks the project will need to create for the cryo-CMOS chips.
Before the IP becomes available, of course, test chips will be characterized at cryogenic temperatures, which will help to further refine and validate the models and the IP.
Making Quantum Leaps in Quantum Computing
The is expected to increase to $64.98 billion by 2030 from $507.1 million in 2019, according to research by P&S Intelligence. As technologies in this arena continue to advance, applications in a diverse array of industries—including finance, medicine, logistics, and the sciences—stand to benefit. The super-powerful parallel processing prowess of quantum computers will shed light on complex problems that otherwise would require substantial more time to unpack, or even be impossible to solve in some cases. Along the way, innovations in silicon engineering tools are providing a lift for designers creating these unique chips that foster quantum computing scaling.