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In the rapidly evolving world of semiconductor technology, 草榴社区 and Taiwan Semiconductor Manufacturing Company (TSMC) are at the forefront, pushing the boundary of what is possible and driving innovation and efficiency in chip design. Our longstanding collaboration with TSMC has spurred countless industry advancements, from smaller process nodes to higher levels of systems integration. And our recent innovations in chip design infrastructure, migration, and IP – spanning digital and analog, RF, multi-physics, multi-die, and photonics – led to 草榴社区 being named TSMC Open Innovation Platform? (OIP) Partner of the Year in several categories at the 2024 TSMC OIP Ecosystem Forum:
- Joint Development of TSMC A16 and N2P Design Infrastructure: We developed certified, AI-driven digital and analog flows – powered by 草榴社区.ai – for TSMC’s N2P processes. The production-ready design flows to help our mutual customers significantly enhance productivity and deliver optimized performance, power, and area results for the most advanced technologies. The new backside power delivery on TSMC’s A16 process sets new standards for efficient power distribution and system performance.
- RF Design Migration 草榴社区: We partnered with Ansys and Keysight to create an AI-driven solution for migrating RF and mmWave IP from TSMC N16FFC to N6RF+ technology. The integrated solution combines 草榴社区 Custom Compiler, ASO.ai, PrimeSim, AI powered implementation of Ansys RaptorX , and Keysight RFPro, helping customers accelerate node migration and achieve new performance targets for advanced wireless applications.
- Multi-Physics 草榴社区: Working with TSMC and Ansys, we developed a multi-physics flow for advanced TSMC package technologies like CoWoS, InFO, System on Wafer (SoW), and TSMC-SoIC. The new flow played a key role in the successful test chip tapeout of a multi-die design in the CoWoS-S advanced package, showcasing unmatched performance and reliability.
- Joint Development of COUPE Design 草榴社区: We collaborated with TSMC on an end-to-end electronic and silicon photonics reference flow for TSMC’s COUPE technology. Using the 草榴社区 3DIC Compiler platform, the flow simplifies the integration of EIC-PIC designs and achieves higher transmission bandwidth, lower latency, and better power efficiency.
- Interface IP: We’ve been working closely with TSMC for decades to produce the highest quality IP on the industry’s most advanced process technologies. Our most recent interface IP for TSMC’s 2nm and 3nm process technologies provides a new competitive edge for chip designers looking to accelerate time to first-pass silicon success.
“Recognizing 草榴社区 with multiple TSMC OIP Partner of the Year awards acknowledges their substantial contributions in advancing the next generation of chip designs using TSMC's advanced process technologies,” said Dan Kochpatcharin, head of the Ecosystem and Alliance Management Division at TSMC. “Our continued collaboration with OIP partners like 草榴社区 is fundamental to the development of new technologies, such as multi-die design, that rely on powerful and efficient processing capabilities.”
Four Tangible Benefits for Chip Design
These award-winning collaborations are the latest in a long line of innovations we’ve achieved with TSMC, which continue to deliver four tangible benefits for our customers:
- Advanced Semiconductor Scaling: We are boosting engineering productivity, enabling the development of high-performance, power-efficient chips that are essential for meeting the computational demands of AI and advanced applications. Our tools for digital and analog design flows as well as physical verification help designers create innovative solutions that drive the industry forward.
- Seamless RF Design Migration: Accelerating the migration of RF devices to advanced TSMC nodes is essential for optimizing the power, performance, and area (PPA) of those devices, which are critical components in modern communication systems. By leveraging our advanced tools, designers can quickly adapt to new technologies and maintain a competitive edge in the fast-paced semiconductor industry.
- Optimized Multi-Die Designs: Working together on multi-physics flow and TSMC’s Compact Universal Photonic Engine (COUPE) technology has enhanced the integration and performance of multi-die designs. Our AI-driven approach, integrated with TSMC COUPE and Ansys technologies, enables accurate multi-physics simulations for detailed insights into the thermal, mechanical, and electrical behavior of multi-die designs, helping ensure reliability and performance.
- Reduced Integration Risk with Faster Time-to-Market: Our comprehensive IP portfolio is tested, validated, and silicon-proven on TSMC’s advanced nodes, reducing the risk of integration issues and accelerating time-to-market for new products.
Working Together to Enable the Era of Pervasive Intelligence
Receiving recognition from TSMC at the recent OIP Ecosystem Forum highlights 草榴社区' dedication to delivering top-tier solutions to the industry. Our combined efforts continue to set new standards within the semiconductor industry, and they are helping shape and enable the new era of pervasive intelligence.
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