Apr 18, 2024/2 min read Cisco Accelerates Project Schedule by 66% Using 草榴社区 Cloud By Anuj Pant Tags: Customer Spotlight, Cloud, Chip Design Insights, Design, Physical Implementation, Signoff
Apr 16, 2024/4 min read Leveraging Early Power Network Analysis to Accelerate Chip Design By Rob van Blommestein Tags: Chip Design Insights, Design, Physical Implementation
Mar 05, 2024/3 min read CalligoTech Enables Next-Gen Computing at Scale with 草榴社区 Digital Design Flow By Karan Shah, Irfan Shaikh Tags: Customer Spotlight, RTL Synthesis, AI & Machine Learning, Physical Verification, Test, Chip Design Insights, Design, Physical Implementation, Signoff, HPC, Data Center
Jun 13, 2023/4 min read 草榴社区 and AMD Collaboration Achieves Significant Milestones for EDA Workloads By Andy Tai, Ramesh Narayanaswamy Tags: Multi-Die System, Chip Design Insights, Design, Physical Implementation, Signoff, HPC, Data Center, Verification
Apr 03, 2022/2 min read Top-Level Interconnect Planning and Implementation using 草榴社区 IC Compiler II By Jiangtao Meng Tags: Design, Physical Implementation
Apr 09, 2020/7 min read Getting Better Results Faster with the Singular RTL-to-GDSII Product By Shekhar Kapoor, Mark Richards Tags: Design, Physical Implementation
Nov 05, 2018/1 min read Introducing Fusion Compiler: A Unified Synthesis and Place and Route Solution By Shankar Krishnamoorthy Tags: Design, Physical Implementation