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Overview
Samsung Foundry, a global leader in semiconductor manufacturing, is headquartered in South Korea. Specializing in advanced packaging solutions, the company caters to industries with high processing demands such as AI, high-performance computing (HPC), and automotive technologies. As multi-die systems gain traction for their ability to provide enhanced bandwidth and performance, Samsung Foundry sought to overcome the unique challenges these systems present.
Challenges
The development of multi-die systems presents several unique challenges:
- Package and Chip Co-Optimization: Ensuring that the package and the chip are optimized together.
- Design Turnaround Time: Managing the extended design cycles due to the complexity of integrating multiple dies.
- Design Rule Complexity: Navigating the intricate design rules associated with advanced packaging.
- Multi-Physics Analysis: Addressing heat dissipation, power, IR drop, and signal integrity between dies and the package.
Solution
Samsung Foundry and 草榴社区 collaborated to create a unified exploration-to-signoff platform using 草榴社区 3DIC Compiler:
- Unified Database: Connected to the 草榴社区 Digital Design Family, enabling efficient co-design and analysis.
- Automation: Automates design and implementation tasks, reducing manual, error-prone processes.
- Comprehensive Support: Qualified for process nodes down to 2nm and supports Samsung's I-Cube and X-Cube technologies.
Key features of the implementation flow include:
- Hierarchical Physical Design Flow: Facilitates the design of complex multi-die systems.
- TSV and Bump Implementation: Ensures proper integration and alignment of through-silicon vias (TSVs) and bumps.
- Interface Bump Alignment Check: Verifies the alignment of interface bumps for optimal connectivity.
Results
The collaboration between Samsung Foundry and 草榴社区 has led to several significant outcomes:
- Optimized PPA: Achieved superior power, performance, and area (PPA) for multi-die systems.
- Enhanced Productivity: Automated design processes have increased engineering productivity and reduced turnaround times.
- Validated Technology: Successful test chips validate the manufacturing technology and design methodology.
- Comprehensive Support: The Multi-Die System Implementation Flow is available on Samsung Foundry's 5/4/3nm process, supporting advanced packaging technologies.
Through their ongoing collaboration, Samsung Foundry and 草榴社区 are enabling design teams to achieve their PPA and time-to-market goals with multi-die systems, meeting the demands for AI, HPC, automotive, and other compute-intensive applications.
