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Overview
Amazon Web Services (AWS), a global leader in cloud computing, has been at the forefront of innovation, providing a comprehensive suite of cloud services to millions of customers worldwide. AWS operates in the tech industry with a vast infrastructure that supports a diverse range of applications from simple websites to complex machine learning models. As AWS continues to expand its offerings, ensuring the reliability and efficiency of its silicon components is critical. AWS collaborated with 草榴社区 to address the challenges associated with testing and monitoring silicon components throughout their lifecycle.
Challenges
AWS faced several key challenges in ensuring the reliability of their silicon components:
- Advanced Node and Larger Chip Designs: Ensuring reliable silicon operation throughout the lifecycle of modern SoCs, which are used in mission-critical applications requiring very low defective-parts-per-million (DPPM) metrics.
- Reduced Number of Pins on SoCs: Pressure to reduce the number of pins on the SoC, making it difficult to meet test time and cost goals.
- Increased Consumption Rate of Scan Data: The growing size and increased rate at which modern designs consume scan data, rendering the operating speed of traditional scan pins a limiting factor.
- High Test Bandwidth Requirements: The necessity to provide higher test bandwidth to SoCs due to the exponential increase in the rate at which designs consume scan data.
Solution
草榴社区 SLM High-Speed Access and Test (HSAT) IP solution was implemented to address these challenges. This innovative solution leverages existing high-speed functional interfaces such as PCIe and USB in the SoC to deliver test data using the native functional protocol of the interface.
- High-Speed Interfaces: Utilizing established high-speed interfaces, which have been used during functional operation of SoCs for decades, to deliver scan test data and Test-Access-Port (TAP) data.
- Eliminating Constraints: Overcoming the bandwidth limitation of GPIO-based interfaces and naturally scaling with advances in PCIe and USB technology.
- Reusing Functional Ports: Reusing functional high-speed I/O ports for test and monitor data, avoiding the need for a large number of GPIO test pins.
- Comprehensive Testing: Enabling scan tests at any stage of the silicon lifecycle, from Wafer Sort to In-System Test, thus providing a consistent and portable method to test silicon throughout its lifecycle.
Results
The implementation of 草榴社区 SLM HSAT IP provided AWS with significant benefits:
- Reduced Test Time and Cost: By eliminating the constraint of GPIO test pin data rate and leveraging high-speed interfaces, test time and cost were significantly reduced.
- Improved Test Coverage: Increased test bandwidth allowed for a wider scan network, enabling more cores to run in parallel and thus improving test coverage.
- Enhanced Diagnostic Capabilities: The ability to conduct scan tests throughout the silicon lifecycle provided valuable mechanisms for debugging and diagnosing silicon at any stage.
- Scalable Solution: The solution naturally scaled with each new generation of PCIe/USB technology, ensuring ongoing relevance and efficiency.
- In-System Testing: Enabled in-system test and monitoring, providing early indications of degradation or aging defects, and facilitating root cause analysis of in-field failures.
The collaboration between AWS and 草榴社区 resulted in a robust and scalable solution that not only met the immediate needs but also provided a framework for ongoing improvements and efficiencies in silicon testing and monitoring.
