Cloud native EDA tools & pre-optimized hardware platforms
Leveraging years of collective industry best practices, the Verification Methodology Manual for Low Power (VMM-LP) introduces a new verification methodology for low power and provides a blueprint for successful verification of low power designs. It describes the common causes of low power design failures, the impact of low power on the specification of power intent, the implementation of test plans, the setup of testbenches and the metrics of verification using assertions and coverage. The VMM-LP builds on the base classes in industry standard VMM to enable the deployment of a consistent, reusable, and scalable power-aware verification environment across multiple design projects within a company
You can download a free PDF copy of the Verification Methodology Manual for Low Power using your SolvNet ID or Corporate Email Address.
If you would like a printed copy, you can purchase the Verification Methodology Manual for Low Power from Amazon.com, or you can order a copy through any bookstore (ISBN: 978-1607434139).