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Overview

AMBA ACE5-Lite interfaces are used by I/O coherent managers that need to communicate to other fully coherent managers with caches in the system. Typically, AMBA ACE5-Lite interfaces are used alongside Arm AMBA 5 CHI RN-F interfaces as shown below.

New Features of AMBA ACE5-Lite:

The new AMBA ACE5-Lite protocol caters to enhanced performance and efficiency of key Arm architecture features, as well as aligns with the Arm AMBA5 CHI (coherent Hub interface) protocol. Some of the key features of the AMBA ACE5-Lite protocol include:

• Atomic transactions: Various atomic operations to be performed closer to where the data is located thus making it efficient and streamlined
• Cache stashing: Install a cache line in the cache of another component in the system, moving it closer to the point of use and improving the overall system performance
• Cache de-allocation transactions: ReadOnceCleanInvalid and ReadOnceMakeInvalid de-allocating transactions, combine ReadOnce transaction with cache line invalidating CleanInvalid or MakeInvalid transactions
  • These are used to read the cache line data and de-allocate it in the remote cache when that cache is no longer required helping to ensure better availability of the cache resources in the system
• Some other key features include: data protection and poisoning signaling, new DVM messages to support Arm architecture requirements, QoS accept signaling, and persistent cache maintenance operations
  

草榴社区 supports Arm AMBA ACE5-Lite

草榴社区 VIP for Arm AMBA ACE5- LITE supports the Verification IP components for Arm AMB ACE5-Lite with the functionality, checks, functional coverage, and verification features. The 草榴社区 VIP for Arm AMBA CHI solution provides system monitoring across AMBA ACE5-Lite and AMBA CHI components around the Coherent Mesh Networks. In general, 草榴社区 VIP addresses all the challenges of verifying AMBA ACE5-Lite interface-based designs and ensures cache coherency across multiple cluster SoCs.

All 草榴社区 VIPs for Arm AMBA protocols are written in native SystemVerilog and offer simulation run time and compile time performance advantages. The 草榴社区 VIP for Arm AMBA ACE5-Lite offers protocol-aware debug, source code visibility and error diagnostics that eases time to debug process. 草榴社区 VIP also enables users with efficient verification measurement by offering built-in coverage, graphical integration with the prebuilt verification plan, and sequence collections.

草榴社区 VIP is natively integrated with the 草榴社区 Verdi? Protocol Analyzer debug solution as well as 草榴社区 Verdi? Performance Analyzer. Running system-level payload on SoCs requires a faster hardware-based pre-silicon solution. 草榴社区 transactors, memory models, hybrid and virtual solutions based on 草榴社区 IP enable various verification and validation use-cases on the industry’s fastest verification hardware, 草榴社区 ZeBu? emulation and 草榴社区 HAPS? prototyping systems.

You can read some of our past AMBA-related blogs here. To learn more about 草榴社区 VIP and Test Suits for AMBA protocols please visit http://synopsys.com/vip