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Hi Li. First, thank you for taking the time today. Please outline how you see the variability in today¡¯s design methodologies evolving? What new challenges?do you?see at advanced nodes?

Li Ding: As?technology scales?down to?5-nanometer?and below,?we are?now down to?3-?and?2-nanometer?designs, so the variability with respect to nominal values?becomes much bigger.?Coping with the variability?is?becoming a much more important?topic,?so there is a strong need to deal with the variability in all dimensions, including process.?One example is?high-sigma requirements for automotive applications.?Another example, in the dimension of voltage, is the time impact with respect to?IR?drop. Finally,?the dimension of temperature is?particularly important?for 3DIC.?

So,?if designers?do not?do anything?and?stay with their traditional timing?margin-based?approach?for?signoff safety,?they are?really?leaving?a lot of?PPA?(power, performance, area) on the table.?

That is indeed challenging! Can you please share how?PrimeShield?addresses these challenges and what role it plays in building confidence in the design flow?

Li Ding: PrimeShield?performs design variation analysis to assess overall design robustness against process variation.?So,?this new?product, empowered by a unique, fast?STA?Monte Carlo engine,?can?accurately model the correlation effect when?there are?multiple timing paths?going through?common cells.?It also answers designers¡¯?questions?on which?path-level sigma?is?required?to?reach?the?desired design-level sigma target.?In?addition,?it can?identify?common weak cells to guide?ECO?fixing to reach design-level sigma targets and improve design Fmax distribution.?

Can you further elaborate on the recent improvements to PrimeShield for handling the ever-increasing performance and productivity requirements? Any machine-learning technologies??

Li Ding: As most designers?are?aware, Monte Carlo?SPICE?simulations are often used to get highly?accurate?path timing in the presence of large process variation. In automotive applications, it is?often needed to close timing at high-sigma levels, for example, 5.2 sigma (which is equivalent to 0.1?PPM?defective?parts per?million) or 6 sigma. Monte Carlo SPICE simulation of a timing path at high sigma requires years of?CPU?hours, which is not practical for production use.?PrimeShield features modern technology?that uses?an innovative machine-learning engine to significantly speed?up simulation runtime and, at the same time,?maintain?true SPICE accuracy.??Using?fast Monte Carlo path simulation?in a typical 3-sigma signoff,?we have?seen?over 100x speedup compared to Monte Carlo SPICE simulation.?We have also seen?over 10,000x speedup?in?automotive high-sigma signoff,?reducing CPU time needed from years to mins-hours range.?

Overall, PrimeShield?seems very well positioned to address the challenges. What are the future directions of?PrimeShield?and something that users can look forward to?

Li Ding: Traditionally, designers are using POCV (parametric on-chip variation) for local process variation and using STA corners to cover global variation. The latter is limiting because, for example, one cannot assume all metal layers are at?the Cworst?corner at the same time. This is often known as?the global?skew effect. We will be rolling out native support for such global skew effects including Vt skew, P/N skew, and interconnect skew to reduce pessimism compared to timing?margin-based?solution.?Second, we are also developing solutions to enable designers to rapidly perform what-if analysis with respect to PVT (process-voltage-temperature) for timing robustness analysis?and?for technology?option?assessment for best PPA.?

Thank you for the overview, Li. It was an illuminating discussion. Any closing statements for our readers?

Li Ding: Thank you.?We are?extremely excited?about?PrimeShield¡¯s?existing features and roadmap capabilities. We look forward to helping designers to improve their advanced node design PPA and robustness.?