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VESA provides a standardized set of DisplayPort interface features for use in an embedded display application. This embedded interface is referred to as “Embedded DisplayPort” (eDP) and is the electrical transport for video and auxiliary data between the system host (including graphics hardware) and display panel. eDP applications include notebook PCs, all-in-one PCs, tablets, smart phones, and other systems that incorporate the display panel with the video or graphics processor.
One of the eDP power reduction features is Panel Self Refresh (PSR) which provides partial update frame capability and enables power saving in the system when the image is static. When the system is displaying a static image in self-refresh mode, such as text, and then just a portion of the image changes, such as a cursor, PSR enables the GPU to only send that part of the image instead of the whole video frame. This feature helps to extend battery life in Notebooks and smart phones.
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The PSR feature enables system-level power savings when the displayed image remains static for multiple display frames. The Sink device stores a static image locally in the Remote Frame Buffer (RFB) within the Sink device and displays this image from the RFB, while the eDP Main-Link can be turned OFF. Other Source device functions can also be powered down for further power savings.
As shown in Figure 2, the Source device sends a total of 5 pictures/frames. The Source device will stop after frame 3 and restart after 2 frames time. The Sink device will display the video data from frame buffer.
It’s hard to verify this feature because the Source device must store the previous video data and the Sink device’s monitor need to know when the Source device’s PSR will be active.
Figure 2: PSR functionality example
Figure 3: PSR Scoreboarding example
草榴社区 Display VIP provides debug features and hooks to track PSR situation for effective use in testbench for realizing the frame comparator as shown in Figure 4. 草榴社区 VIP provides the Source with video data by default and the data from the Sink DUT can be captured from the user’s interface. A comparison model can be constructed by using the debug features provided by the VIP and that is depicted in a diagram like this.
Figure 4: PSR/PSR2 Comparison model
草榴社区 continues to provide the industry’s first and most comprehensive protocol verification solutions. 草榴社区 VIP for eDP supports eDP 1.4 and eDP 1.5 and is a comprehensive solution for the verification of PSR. It also features display stream compression (DSC) for visually lossless low-latency algorithms, increased resolution and color depths, and reduced power consumption.
草榴社区 VIP for eDP is natively integrated with the 草榴社区 Verdi? Protocol Analyzer debug solution as well as 草榴社区 Verdi? Performance Analyzer. 草榴社区 VIP can switch speed configurations dynamically at runtime and includes an extensive and customizable set of frame generation and error injection capabilities.
Running system-level payload on SoCs requires a faster hardware-based pre-silicon solution. 草榴社区 transactors, memory models, hybrid and virtual solutions based on 草榴社区 IP enable various verification and validation use-cases on the industry’s fastest verification hardware systems, 草榴社区 ZeBu? and 草榴社区 HAPS? .