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The 草榴社区 Custom Design Family is fast, productive and easy to adopt. Thousands of analog and mixed-signal designers are using it daily to deliver new designs at an unprecedented pace. Below, some of the teams who have already made the move to 草榴社区 share their experiences.
CoreHW Designs an 80-GHz PLL RF IP
This video discusses how CoreHW designed a fractional-N PLL IP with fundamental VCO frequency range of 19~20.25GHz with RF frequency range extended to 38~40.5GHz and 76~81GHz using the 草榴社区 Custom Design Family.
In-design Electrical Reporting Process for Samsung Foundry Advanced Nodes
Watch how Samsung reduced the design iterations for their custom design flow by performing the EM analysis with foundry-qualified signoff engines during layout. Customers are also adopting this solution in their design flows through DSK (Design Solution Kit).
In-Design Simulation: Partial Layout Extraction For Samsung Foundry
This presentation highlights how Samsung Foundry adopted 草榴社区 Partial Layout Extraction (PLE) method for its advanced node 4, 5 and 7 nm designs and plans to implement it into its AMS ecosystem.
Template Based Analog Layout Flow at SK hynix
This presentation highlights how SK hynix achieved the benefits of using a template-based flow for?design time reduction and 3x productivity gain on their analog layouts using Custom Compiler.
Improving Productivity and Ease of Use of Cosim Setup For Analog-Centric Users
The proposed flow suits the new design structure by supporting the analog submodule replacement with SPICE. It provides more flexibilities for different test cases and provides more tool options. It also clearly defines the files that need to be maintained for digital and analog engineers.
Design of CMOS Image Sensors with 草榴社区 Custom Design Platform
Adria Bofill Petit, Co-founder and CTO of IMASENIC, discusses how IMASENIC develops CMOS image sensor products for a variety of applications and achieve first-time right designs for these complex sensors using 草榴社区 Custom Design Platform.
Panasonic Success
Hiroyuki Tsujikawa, Director of Technology Management Office at Panasonic Semiconductor 草榴社区, discusses Panasonic’s partnership with the Japanese government on the “Society 5.0” vision, which uses AI and IoT to meet social challenges. Panasonic’s work on this project includes development of highly accurate spatial and battery performance sensing devices for autonomous control. Panasonic deployed the 草榴社区 custom design platform to accelerate the design of these high precision analog devices.
STMicroelectronics Success
Ashish Kumar, Sr. Manager, Memory IP division at STMicroelectronics India, discusses how ST uses the Sigma Amplification technology within CustomSim? simulator to run 4+sigma Monte Carlo analysis on memory critical paths with far fewer samples than conventional approaches and thus ensure memory IP robustness in a cost effective manner.
DesignWare IP Team Success
Dino Toffolon, VP of Engineering for DesignWare?
IP at 草榴社区, discusses his team's successful development of advanced, silicon-proven, mixed-signal interface IP using 草榴社区 Custom Design Platform.
Seagate Success
Ken Evans, Managing Technologist at Seagate Technology, discusses the advantages of using Custom Compiler? design and layout solution on their storage design.
Esperanto Success
At DAC 2018, Michael Dierickx discussed how Esperanto Technologies automated physical design of an energy-efficient machine-learning processor using Custom Compiler? design and layout solution.
Panasonic Success
Hiroyuki Kobayashi, EDA Group Manager at Panasonic, discusses how he and his team improved automotive LSI layout productivity using Custom Compiler? design and layout solution.
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