Cloud native EDA tools & pre-optimized hardware platforms
Continuous Integration is a software development practice used to improve software quality and reduce deployment risk in every step of the development process – from prototyping through final product deployment. Applying the principles of Continuous Integration to hardware is now a reality, enabling designers to implement the same practices and principles of software development to hardware projects, improving quality and reducing risk.
Continuous Integration (CI) was first named and proposed in 1991 as a software engineering practice for merging and integrating all developers’ working copies to a shared mainline several times a day.
The concept has since evolved to automatically build and test after each integration in a continuous cycle of builds so that the integration becomes a non-event. The cycles include developing, building and compilation, executing automated tests and inspections, deploying software and receiving feedback (Figure 1).
Figure 1: Continuous Integration cycle
At a high level, CI allows software development teams to:
Prior to the rise of SoC prototyping, hardware and system design could be very risky because feedback would only occur after producing a test chip or even the final SoC. Setting up test environments for hardware projects is time consuming, and if compliance testing is also needed, the setup time is even longer with lots of manual work. This drawn-out process can lead to a lack of consistency in testing.
With physical prototyping, such as HAPS prototyping systems and DesignWare IP Prototyping Kits, designers can start designing and iterating prior to final hardware availability, saving weeks or months of development time.
DesignWare IP Prototyping Kits provide the essential hardware and software elements needed to reduce IP prototyping and integration effort. Implemented on 草榴社区 HAPS-DX physical prototyping systems, these platforms are used as a proven and complete reference design with validated IP configurations and necessary SoC integration logic and the necessary software drivers for targeting system bring-up, debug and testing.
Using physical prototyping as a co-design environment gives designers an earlier understanding of the impact of design decisions in the system, code and configurations. Decisions can be verified with real world I/Os and hardware, which allows both hardware and software teams to make choices that streamline SoC design and testing. The blurred lines between these two worlds is vanishing due to the adoption of prototyping methodologies and verification flows where hardware and software design are tightly coupled (Figure 2).
Figure 2: Merge of software and hardware development cycles
The blurred lines are particularly true when considering the prototyping environment and verification flows; where "software" engineers are making "hardware" decisions for core configurability and RTL connectivity, while "hardware" engineers are more than ever aware of the software elements and are proposing or even coding elements for interfacing and debugging.
Applying the principles of CI to hardware and hardware plus software is now a reality, enabling designers to implement the practices and principles of software development to SoC prototyping projects, thereby improving quality, accelerating the feedback loop and reducing design risk.
The CI concepts applied to SoC prototyping help bring together the hardware and software as a system, which allows for fast feedback at various stages in the cycle: system development, integration and testing.
To further accelerate system development for software and hardware engineers, IP and prototyping vendors are delivering tools to speed bring-up and help development teams understand the impact of their hardware/software configurations for the final design early in the process – when design changes can still be made.
Today, physical prototyping platforms enable designers to achieve first-silicon success through the use of CI and the ability to get feedback earlier in the design cycle. Using these new tools and platforms provides a clear path for testing configurations at a transaction level and/or provide an actual co-design environment where the code and configuration can be verified on hardware.
To bring together these worlds the choice of an automation engine becomes crucial. The automation engine should be able to access RTL (IP hardware) and software source code, integrate the required tools (RTL synthesis, C code compiler, etc.), deploy them in real hardware platforms like FPGA boards, test the full system and produce reports (Figure 3).
Figure 3: Automation engine's role in a hardware + software CI environment
草榴社区’ internal team responsible for testing and validating the DesignWare Controller IP in a prototyping context faced the challenges that all the hardware validation was done manually, using scripts that were maintained ad-hoc, without the possibility for regression. This resulted in several issues:
To improve software and hardware integration during the development stage, 草榴社区 developed and deployed a CI system to combine and accelerate the deployment of hardware and software.
The 草榴社区 team used DesignWare IP Prototyping Kits as the platform to test their new automation process and the core platform to deploy the automation engine. The kits center around a complete, out-of-the-box reference design that consists of a validated IP configuration and necessary SoC integration logic such as clock, reset, power management, and test logic for a specific IP protocol, implemented on 草榴社区' HAPS-DX physical prototyping system. The kits are an ideal platform for the 草榴社区 team to learn how to create and follow basic principles in IP testing and validation projects:
Setting up a flow to bring CI to hardware and software allows for testing to start earlier, reduced testing costs and time in the testing phase. The flow shown in figure 4 allows 草榴社区 teams to test and validate not only the digital design but also the hardware validation design, software implementation and the whole system instantiated in the FPGA:
Figure 4: Hardware + software CI
The flow starts by getting the latest RTL and hardware validation designs, followed by running testbench simulations, and then running synthesis flow. Next, the synthetized hardware can be deployed and programmed in an IP Prototyping Kit via a bit file. The latest software code can be fetched, compiled and deployed in the IP Prototyping Kit. At this point the whole system (hardware and software) can be fully tested and validated as an integrated solution. This loop can be continuously run in the same way, ensuring consistency, and also improving the testing reliability and coverage every time the cycle is repeated.
Figure 5: Continuous integration with IP Prototyping Kits
Using the CI concepts, defining a flow for hardware and software, deploying and setting up IP Prototyping Kit-based test automation with an automation engine, enable 草榴社区 teams to build, test and validate the IP products with improved quality, faster and more frequently.