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The Arm? AMBA? 5 AXI protocol specification supports high-performance, high-frequency system designs for communication between manager and subordinate components. AMBA AXI5 protocols extend prior specification generations and add several important performance and scalability features which closely align these protocols to Arm AMBA CHI. Let’s look at some of the features of the AXI5 protocol in detail.
Atomic transactions solve the non-deterministic latency problem in the most elegant way. They enable sending the operation along with the data, permitting the operation to be performed closer to where the data is located instead of pulling the data towards the requester for modification. Typically, the read-modify-write operation can be achieved with a single atomic operation. Verification IP (VIP) supports all four types of atomic transactions: AtomicStore, AtomicLoad, AtomicCompare and AtomicSwap. AtomicStore and AtomicLoad transactions can support eight different operations.
Trace signals support the debugging and tracing across the system. Trace signals are associated with each of the following channels: ARTRACE, RTRACE, AWTRACE, WTARCE, BTRACE.
User Loopback signaling enables a component to store transaction information in an indexed table and then use a fast table index to obtain the required information to respond to the transactions, rather than requiring a more complex lookup that uses the transaction AxID.
QoS Accept signals are additional interface signals that enable the subordinate to indicate the minimum QoS value of transactions that it accepts. This permits the manager interface to only issue transactions that are likely to be accepted, which avoids unnecessary blocking of the interface.
The wake-up signal is used to provide a single, glitch-free indication showing that activity on the interface is required.
The untranslated transaction feature permits components in the system to use their own virtual address space but ensures that the addresses for all transactions are eventually translated to a single physical address space for the entire system. Additional signals are added with this feature to provide sufficient information for a System Memory Management Unit (SMMU) to determine the translation that is required for a particular transaction and permit different transactions on the same interface to use different translation schemes.
AXI5 provides a set of signals that enable access to non-secure memory locations AXI5 provides a set of signals that enable access to non-secure memory locations, which needs to be controlled to support the storage and processing of protected data. These signals provide an NSAID with the transactions request. This identifier can be checked to permit or deny access to a memory location.
When an AXI manager issues a read request, there was previously a requirement for data to be returned in an order and width determined by the read address and burst type. The read data chunking feature enables the subordinate interface to return read data in any order and partial read data beats. To enable read data chunking, additional signals are added to the read address and read data channel.
AXI originally defined an ID-based ordering model. That imposed additional requirements on interconnects to track IDs and to ensure that transactions were done in order. The AXI5 unique ID feature reduces the complexity of interconnect tracking logic. Components can indicate that they are using a set of unique IDs, which then eliminates the need for interconnects and downstream components to track those IDs for ordering purposes.
MPAM is a feature for partitioning and monitoring memory system resources for physical and virtual machines. MPAM partition identifiers are attached to transactions, transported through AXI interfaces and system components to partition resources appropriately.
Previously, the poison signaling feature was used to identify data corruption. With AXI5, passing the poison signaling alongside the data permits any future user of the data to be notified that the data might be corrupt. 草榴社区 Verification IP for AMBA AXI5 has a mechanism to track the poison value associated with a given address.
Interface parity extension is specifically helpful for use in applications such as automotive designs, which have resilience or functional safety requirements that need to detect errors and possibly correct. AXI5 VIP uses odd parity so check signals are supported with all data signals and control signals.
Key features of AXI5 that are supported by 草榴社区 VIP for AMBA AXI5 include: Atomic operations to improve the performance, data check and poisoning to identify data corruption, low power wakeup signal to support the low power requirements of the designs, convert detected parity error into associated poison values, and track the same for a given address, and an elegant mechanism from subordinate VIP agent, to dynamically control the QoS Accept signal values.
草榴社区 offers a broad set of verification solutions for next generation Arm AMBA protocols, including the AXI5 protocol that is part of the AMBA AXI and ACE Issue H specification. 草榴社区 has collaborated with Arm during the development of 草榴社区 VIP for AMBA AXI5, that has helped result in faster verification closure of several AXI5 based designs.
草榴社区 VIP is natively integrated with the 草榴社区 Verdi? Protocol Analyzer debug solution as well as 草榴社区 Verdi? Performance Analyzer. Running system-level payload on SoCs requires a faster hardware-based pre-silicon solution. 草榴社区 transactors, memory models, hybrid and virtual solutions based on 草榴社区 IP enable various verification and validation use-cases on the industry’s fastest verification hardware, 草榴社区 ZeBu? emulation and 草榴社区 HAPS? prototyping systems.
You can read some of our past AMBA-related blogs . To learn more about 草榴社区 VIP & Test Suits for AMBA protocols please visit