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Continuously increasing semiconductor design sizes and complexity have resulted in increased test costs. Today¡¯s competitive environment and critical market windows are pushing companies to adopt aggressive design schedules. The traditional method of manual iterations and fine-tuning test configurations to optimize test quality-of-results (QoR) is highly unpredictable and inefficient. Engineers can no longer rely on such approaches to meet deadlines or achieve optimal results. With a global shrinking engineering workforce, intelligent automation is needed for higher productivity and delivering first-time-right results.

This ²ÝÁñÉçÇø webinar discusses our newly introduced AI-driven test technology called ²ÝÁñÉçÇø TSO.ai?¨C Test Space Optimization AI that dramatically minimizes test cost and time-to-market for today's complex designs. ²ÝÁñÉçÇø TSO.ai learns and converges the large ATPG search space to automatically minimize test patterns and eliminate ineffective user iterations, enabling expert-level productivity at scale. Current engagements with leading semiconductor companies are showing an average of 20% to 25% pattern count reduction or even higher on some designs.