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Ensuring Functional Safety with Advanced Fault Simulation

Chips being designed today are used in safety-critical applications, where faults in the field cannot be allowed to compromise the safe operation.?

This white paper presents a far more capable and comprehensive solution than traditional methods and tools to assess the impact of faults in the field and ensure that the designs respond appropriately. The solution integrates functional verification and fault simulation into a single flow that can handle functional safety requirements for even the largest system-on-chip (SoC) designs.

• Link functional verification and fault simulation
• Accelerate fault coverage closure