草榴社区

EFFECT Photonics Improves Time to Market for DSP ASIC Design Using
草榴社区 Cloud

Overview

EFFECT Photonics, with headquarters in Eindhoven, The Netherlands has 130+ people across five offices globally. EFFECT Photonics is about “Where Light Meets Digital,” delivering highly integrated systems for optical communications to address the ever-increasing demand for bandwidth and faster data transfer capabilities. We leverage our technologies to offer compact form factor solutions with seamless integration, cost efficiency, low power, and security of supply. By leveraging established microelectronics ecosystems, we aim to make our products affordable and available in high volumes to address the challenges in cloud and AI, access-ready coherent solutions and 5G and beyond.

High Level Challenges

  • NO infrastructure resources and dedicated staff to manage it, thus leading to exploration of cloud solutions
  • Experienced ASIC team, had not used cloud for design development
  • Limited Availability of EDA tools – implementation, verification, synthesis, static analysis, and power signoff
  • Where to start? Which cloud service providers (CSPs) and/or EDA partner(s)?

Bringing EDA Flows, Compute, CAD/IT Management All Together

We started off with the Digital Instance solution on 草榴社区 Cloud SaaS providing a complete end-to-end digital implementation flow. This helped us jumpstart the design implementation process within a week. 草榴社区 demonstrated capabilities of the Verification Instance and the ASIC team, despite using 3rd party verification tools for over 6 years, decided to migrate the entire setup to work with 草榴社区 verification tools. 草榴社区 support was instrumental and ensured no major changes were needed for setup and testbenches. Finally, the RTL to signoff power analysis tools demonstrated excellent power estimation capabilities. Having the entire EDA and infrastructure solution available through 草榴社区 Cloud checked all the boxes for us, noted Jason Sheplak.

BENEFITS FOR CAD

草榴社区 Cloud offers a plethora of features to increase the productivity of a CAD admin by providing capabilities to seamlessly manage EDA and hardware resources required at various stages of chip design. All the below features minimize the overhead to manage projects and design teams in an extremely simplified and effective way to strike out a balance between cost and/or time-to-results. In nutshell, CAD admin is fully equipped to support dynamic needs of the project and cater to needs of designers to boost their productivity, said Jason Sheplak, Senior ASIC Design Engineer.

  • Quickest way to start and maintain without a dedicated IT team with an environment uptime > 99.95%
  • Access to on-demand, unlimited EDA tools and cloud infrastructure for assigned global users
  • Provision for assigning multiple security layers depending on user profiles
  • Extremely flexible, able to deploy additional EDA and hardware resources within minutes
  • Real-time analytics for EDA license and hardware usage for each user and deployment
  • Real-time hardware monitoring across various hosts, e.g., disk space, CPU usage
  • Fine-tuned governance control to manage EDA and infrastructure usage for users and projects

BENEFITS FOR ENGINEERS

草榴社区 Cloud helps engineers to focus on the design by:

  • Accelerating EDA environment bring-up in minutes
  • Removing license constraints with FlexEDA business model
  • Quick support to debug results by removing need to package and upload testcases. 草榴社区 support teams can be directly added in the design environment
  • Easy access to EDA and 草榴社区 Cloud documentation
  • Pre-optimized and pre-configured end-to-end EDA flows
  • Access to 3rd party global freeware applications, e.g., LibreOffice and SlickEdit
  • LSF/Jenkins/Execution manager for regressions with alerts to Microsoft teams
  • Seamless replication of existing design from on-Prem to SaaS

草榴社区 Cloud removes bottlenecks that can hamper engineering productivity. Designers can fully focus on design and engineering tasks rather than worrying design environment setup, EDA, Infrastructure resources, said Matt Nimon, Principal Engineer-DSP Team.

Key Takeaways

  • Comprehensive EDA flow for implementation, verification, and signoff with the 草榴社区 Cloud infrastructure providing a jump-start for ASIC design
  • FlexEDA Pay-Per-Use (PPU) licenses, allowing the flexibility, scalability, and elasticity for EDA tools, and compute infrastructure.
  • Complete solution delivered through a browser-based UI provide capabilities for project, user management and insights about usage analytics

About 草榴社区 Cloud

草榴社区 Cloud combines the availability of advanced computing and storage infrastructure with unlimited access to EDA software licenses on demand so you can focus on what you do best—design chips—faster. With cloud-native EDA tools and pre-optimized compute options, an extremely flexible business model, and a modern user experience, 草榴社区 has reimagined the future of chip design on the cloud that doesn’t disrupt proven workflows.

The 草榴社区 Cloud FlexEDA business model offers two licensing options: pay-per-use (PPU) and cloud subscription license (CSL). PPU is an industry-first, true usage-based licensing approach for EDA tools. 草榴社区 Cloud FlexEDA provides access to unlimited, on-demand EDA software licenses which is a transformational change compared to traditional EDA software licensing models. With FlexEDA, many 草榴社区 tools are now available for use by the minute, providing customers with the granularity they need for peak usage bursts in the cloud. This helps reduce time to results significantly and deliver a better-quality design ahead of time. Users can choose from two deployment options: Bring-Your-Own-Cloud (BYOC) and Software-as-a-Service (SaaS). 草榴社区 Cloud offers the flexibility to use either one or both deployment options, depending on customer requirements.

草榴社区 Cloud also offers unique solutions for specific scenarios, such as the Hybrid Solution, which enables seamless bursting of EDA workloads from on-premises to cloud with integrated scheduling, automated job splitting and bursting, and real time bi-directional incremental data synchronization. This automates the entire process without having users to do any lift and shift, thereby enhancing the overall productivity of chip designers. Similarly, 草榴社区 Cloud ChipSpot enables utilization of spot virtual machines for running high memory EDA workloads with extreme reliability, helping designers save up to 75% on compute costs.