础滨驱动的设计应用
Welcome to the Designer's Digest!
The size and complexity of today’s designs, coupled with the challenges of meeting timing, area, power, and schedule, requires that the newest, most advanced synthesis optimizations be fully verifiable. Using Formality, designers are able to achieve the highest verifiable QoR with Design Compiler or Fusion Compiler. Formality guides you through the implementation of the functional ECO with minimal impact to the design and verified correctness in minutes.
We sat down with Todd Buzan, R&D Director in 草榴社区' Design group, to learn more about 草榴社区’ functional ECO solutions and the challenges faced in minimizing the impact of late-stage functional ECOs on design implementation and tapeout schedules.
Formality automation sets commands and variables to match synthesis, eliminating error-prone scripts.
Read MoreBroadcom used Formality's interactive ECO capabilities to implement late-stage manual ECOs.
View PresentationSathappan Palaniappan of Broadcom describes his experience using Formality for manual ECOs.
Watch VideoFormality uses formal, static techniques to determine if two versions of a design are functionally equivalent.
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