草榴社区 3DIO IP Solution
草榴社区 3DIO IP Solution is a specialized IO for multi-die integration. It includes multiple IP offerings for system-on-chip (SoC) designers to implement tunable, integrated multi-die design structures targeting HPC (AI), GPU, CPU, and mobile applications. The optimal area of the 3DIO IP is carefully designed to be within the BUMP, providing significant advantages in implementation and signal routing.
草榴社区 3DIO IP Solution is architected to support 2.5D, 3D and SoIC package form factors, with flexible physical dimensions on u-BUMP or TSV integration. It comprises a portfolio of 3DIO IP products enabling various use cases: Synthesizable 3DIO for automated placements of thousands of IOs on the bumps, Source Synchronous 3DIO (SS3DIO) for building custom macros, and fully integrated 3DIO-PHY for high performance and fast time-to-market.
草榴社区 3DIO IP Solution is part of the 草榴社区 IP offering for Multi-Die 草榴社区 including UCIe (PHY, Controller, VIP) and HBM3 IP.
The 草榴社区 3DIO IP Solution enables designers to create efficient chips in a faster time to market, accelerated with 草榴社区 3DIC Compiler to ease integration and provide optimized power, performance, and area (PPA) for a given technology.
Read Article: 草榴社区 3DIO Solution for Multi-Die Integration (2.5D/3D)
Download 草榴社区 3DIO IP Solution Datasheet
? Optimized for heterogeneous integration in 3D stacking
? Enabling designers the flexibility & scalability to accelerate multi-die integration
? Optimal PPA architected to support 2.5D and 3D packages
? Versatile IP offerings tuned for various use scenarios, comprising:
- Synthesizable 3DIO for flexible physical implementation
- Source Synchronous 3DIO (SS3DIO) for building customized macros
- Fully integrated 3DIO PHY for optimal performance
? Compact integrated design, for smallest power & area (<50% of the hybrid bump pitch)
? Compatible with 3DIC Compiler, for fast timing closure
| Description: | TSMC N3P 3DIO Library |
| Name: | dwc_io_ts3ffp_3dio |
| ECCN: | 3E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare IO |
| Documentation: | Contact Us for More Information |
| Description: | TSMC N3P Source Sync 3DIO Library |
| Name: | dwc_io_ts3ffp_ss3dio |
| ECCN: | 3E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare IO |
| Documentation: | Contact Us for More Information |
| Description: | TSMC N3P Source Sync 3DIO PHY |
| Name: | dwc_io_ts3ffp_ss3dio_phy |
| ECCN: | 3E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare IO |
| Documentation: | Contact Us for More Information |
| Description: | TSMC N5 3DIO Library |
| Name: | dwc_io_ts5ff_3dio |
| ECCN: | 3E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare IO |
| Documentation: | Contact Us for More Information |
| Description: | TSMC N5 Source Sync 3DIO Library |
| Name: | dwc_io_ts5ff_ss3dio |
| ECCN: | 3E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare IO |
| Documentation: | Contact Us for More Information |
| Description: | TSMC N5 Source Sync 3DIO PHY |
| Name: | dwc_io_ts5ff_ss3dio_phy |
| ECCN: | 3E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare IO |
| Documentation: | Contact Us for More Information |