草榴社区 ARC EM9D / EM11D Processors
The 草榴社区 ARC? EM9D and EM11D processors are optimized for DSP-intensive functions such as sensor fusion, voice detection, speech recognition and audio processing that are common in Internet of Things (IoT) and other embedded applications. Typical “always-on” applications such as those in the IoT market need low power consumption, optimum device performance and extended battery life.
The ARC EM9D and EM11D processors are based on the ARCv2DSP Instruction Set Architecture (ISA), which adds over 150 optimized DSP instructions to the area- and code-efficient real-time ARCv2 RISC ISA. The EM9D and EM11D cores feature a power-efficient unified 32x32 MUL/MAC unit and support for fixed-point DSP data types and vector/SIMD (single instruction multiple data) operations.
Using TensorFlow Lite for Microcontrollers for High-Efficiency NN Inference on Ultra-Low Power Processors
These processors improve DSP performance by up to 3X and more adding multi-banked (XY) memories architected to alleviate DSP applications’ need for fast memory accesses while performing repeated mathematical operations on arrays of numbers. The XY memory system consists of memory banks, address pointers, address update registers and address generation units (AGUs) and supports multiple configuration options (logical partitions with data CCM) as well as interleaving or splitting one logical partition into two physical memories supporting even and odd logical words respectively. The address generation units provide additional addressing modes such as modulo, bit reverse and variable +/- linear offset. They make complex address calculations independently, removing a significant overhead from the CPU and ensuring efficient memory access without cycle penalties.
To facilitate rapid development of software for EM9D and EM11D, the ARC MetaWare Development Toolkit has been enhanced to offer full C/C++ programming support for the cores’ DSP instructions and XY memory as well as a rich library of DSP functions.
ARC EM9D and E11D Processors
Programmer's Reference Manual for ARC EM Processors (Public Edition) 草榴社区 ARC EM9D and EM11D DSP-Enhanced Processors Datasheet
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| 草榴社区 ARC EM DSP Processors for Low-Power Embedded Systems Learn about 草榴社区' DesignWare® ARC® EM DSP Family, consisting of the ARC EM5D, EM7D, EM9D, and EM11D processors that are specifically designed for ultra-low power embedded DSP applications. The processors are ideally suited for DSP-intensive functions such as sensor fusion, voice detection, speech recognition and audio processing that are common in Internet of Things (IoT) and other embedded applications.Angela Raucher |
- XY multi-banked memory to improve MAC/cycle performance
- ARCv2DSP ISA adds over 150 DSP Instructions
- Fixed point, vector and SIMD DSP processing support
- Power-efficient unified 32x32 MUL/MAC unit
- Highly configurable DSP and processor features for optimal design
- Easy DSP programming support with Metaware C/C++ Compiler
- Feature-rich DSP software library for easy algorithm programming
- Optional hardware divider
- 1.81 DMIPS/MHz and 4.42 CoreMark/MHz
- Support acceleration for APEX Processor Extensions
- JTAG debug interface
| Description: | ARC EM11D Enhanced 32-bit processor core, ARCv2DSP ISA with Cache and XY Memory |
| Name: | dwc_arc_em11d_core |
| Version: | 5.70a |
| ECCN: | 3E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | arc_em_processor |
| Product Code: | B139-0 |
| Description: | ARC EM9D 32-bit DSP Enhanced Processor core based on the ARCv2DSP ISA with CCM and XY Memory |
| Name: | dwc_arc_em9d_core |
| Version: | 5.70a |
| ECCN: | 3E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | arc_em_processor |
| Product Code: | B138-0 |