2022-10-26 15:53:39
The 草榴社区 USB 3.0 Device Controller is a set of synthesizable soft IP that ASIC/FPGA designers can use to implement a complete USB 3.0 Device for 5 Gbps speeds. Integrating this digital, synthesizable logic into an ASIC, FPGA, or ASSP peripheral design helps to ensure complete USB 3.0 compliance, device functionality, and backward compatibility with USB 2.0. Optimizing development time and minimizing engineering risk, the 草榴社区 USB 3.0 Device Controller helps designers bring their host and peripheral designs to market faster for wired and wireless applications such as smart phones, tablets, TVs, set-top boxes, cameras, modems, game consoles, PCs, and telecommunications equipment.
The USB 3.0 Device Controller features industry-standard interfaces PIPE and UTMI/UTMI+ that connect to a USB 3.0 PHY. The SSIC features allows for the controller to interface with a MIPI M-PHY for low-power mobile applications.
草榴社区 USB Controllers have shipped in over one billion units for electronics leading companies worldwide. Using 草榴社区 USB IP significantly reduces development time and engineering risk, bringing USB-based SoCs to market faster.
草榴社区 USB IP is the most certified IP solution in the industry. With over 3,000 design wins, 草榴社区' complete USB IP solution--consisting of controllers, PHYs, verification IP, drivers, and IP prototypes--enables designers to lower integration risk and speed time-to-market.
草榴社区 SuperSpeed USB 3.0 Complete Solution
Highlights
Products
Downloads and Documentation
- Certified by the USB-IF
- SuperSpeed (5 Gbps) or High-Speed (480 Mbps) operation supported
- Optimized power management with SuperSpeed USB power savings modes, Uniform Power Format (UPF) and dual power rails
- Configurable data buffering options to fine-tune performance/area trade-offs
- Supports up to 16 bi-directional endpoints
- AXI and AHB interfaces or Native Interface for bridging to other system buses
- Compatible with 草榴社区' Certified USB 2.0 PHYs and USB 3.0 PHYs
- Verilog source code
- Verilog Test Bench included
| SuperSpeed USB 3.0 Device Controller Supporting SSIC and HSIC | STARs |
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| SuperSpeed USB 3.0 Dual Role Device Controller, Configurable for SSIC and HSIC | STARs |
Subscribe |
| Description: |
SuperSpeed USB 3.0 Device Controller Supporting SSIC and HSIC |
| Name: |
dwc_usb_3_0_device |
| Version: |
4.00b |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
| Documentation: |
Hide Documents...
Application Notes DesignWare Cores USB 3.0 PHY-Controller Integration Guide ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Packaged Verification Environment Application Note (App Note Version 1.00a) ( PDF | HTML )
Designware Cores SuperSpeed USB 3.0 Controller Synthesis and CTS Application Note ( PDF )
Setting Global Bus Configuration Registers ( PDF | HTML )
Databooks 草榴社区 Controller IP SuperSpeed USB 3.0 Controller Databook (4.00b) ( PDF | HTML )
草榴社区 Controller IP SuperSpeed USB 3.0 Controller Databook - with Change Bars (4.00b) ( PDF )
Datasheets DesignWare SuperSpeed USB 3.1 IP Solution ( PDF )
草榴社区 IP Prototyping Kits for USB 3.1 Host and Device ( PDF )
草榴社区 SuperSpeed USB 3.0 Complete Solution ( PDF )
Installation Guide 草榴社区 Controller IP SuperSpeed USB 3.0 Controller Installation Guide (4.00b) ( PDF | HTML )
Programming Guides 草榴社区 Controller IP SuperSpeed USB 3.0 Controller Programming Guide (4.00b) ( PDF | HTML )
草榴社区 Controller IP SuperSpeed USB 3.0 Controller Programming Guide - with Change Bars (4.00b) ( PDF )
Release Notes 草榴社区 Controller IP SuperSpeed USB 3.0 Controller Release Notes (4.00b) ( PDF )
Success Stories DisplayLink Achieves First-Pass Silicon Success with 草榴社区 USB 3.0 IP ( PDF )
First-Pass Silicon Success for Myriad 2 Vision Processing Unit with 草榴社区 USB 3.0, LPDDR3/2 & MIPI D-PHY IP ( PDF )
Fujitsu Semiconductor Selects 草榴社区 DigRFv4 M-PHY and DigRF 3G PHY IP for Customer's 2G/3G/4G Baseband Design ( PDF )
Realtek Achieves First Silicon Success for Industry's First Certified USB 3.0 Card Reader with 草榴社区 USB 3.0 IP ( PDF )
Training Videos Configuring DWC_usb3 Controller as a Device ( HTML )
DWC_usb3 Controller Clocks and Clock Synthesis ( HTML )
Managing Power in DWC_usb3 ( HTML )
User Guides 草榴社区 Controller IP SuperSpeed USB 3.0 Controller User Guide (4.00b) ( PDF | HTML )
草榴社区 Controller IP SuperSpeed USB 3.0 Controller User Guide - with Change Bars (4.00b) ( PDF )
White Papers Debugging SuperSpeed USB Software Using Virtual Prototypes ( PDF )
USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Toolsets: |
Qualified Toolsets |
| Download: |
dw_iip_DWC_usb3 |
| Product Code: |
6793-0 |
| Description: |
SuperSpeed USB 3.0 Dual Role Device Controller, Configurable for SSIC and HSIC |
| Name: |
dwc_usb_3_0_drd |
| Version: |
4.00b |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
| Documentation: |
Hide Documents...
Application Notes DesignWare Cores USB 3.0 PHY-Controller Integration Guide ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Packaged Verification Environment Application Note (App Note Version 1.00a) ( PDF | HTML )
Designware Cores SuperSpeed USB 3.0 Controller Synthesis and CTS Application Note ( PDF )
Setting Global Bus Configuration Registers ( PDF | HTML )
Databooks 草榴社区 Controller IP SuperSpeed USB 3.0 Controller Databook (4.00b) ( PDF | HTML )
草榴社区 Controller IP SuperSpeed USB 3.0 Controller Databook - with Change Bars (4.00b) ( PDF )
Datasheets DesignWare SuperSpeed USB 3.1 IP Solution ( PDF )
草榴社区 IP Prototyping Kits for USB 3.1 Host and Device ( PDF )
草榴社区 SuperSpeed USB 3.0 Complete Solution ( PDF )
Installation Guide 草榴社区 Controller IP SuperSpeed USB 3.0 Controller Installation Guide (4.00b) ( PDF | HTML )
Programming Guides 草榴社区 Controller IP SuperSpeed USB 3.0 Controller Programming Guide (4.00b) ( PDF | HTML )
草榴社区 Controller IP SuperSpeed USB 3.0 Controller Programming Guide - with Change Bars (4.00b) ( PDF )
Release Notes 草榴社区 Controller IP SuperSpeed USB 3.0 Controller Release Notes (4.00b) ( PDF )
Success Story First-Pass Silicon Success for Myriad 2 Vision Processing Unit with 草榴社区 USB 3.0, LPDDR3/2 & MIPI D-PHY IP ( PDF )
Training Videos Configuring DWC_usb3 Controller as a Device ( HTML )
Configuring DWC_usb3 Controller as a Host ( HTML )
DWC_usb3 Controller Clocks and Clock Synthesis ( HTML )
Managing Power in DWC_usb3 ( HTML )
User Guides 草榴社区 Controller IP SuperSpeed USB 3.0 Controller User Guide (4.00b) ( PDF | HTML )
草榴社区 Controller IP SuperSpeed USB 3.0 Controller User Guide - with Change Bars (4.00b) ( PDF )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Toolsets: |
Qualified Toolsets |
| Download: |
dw_iip_DWC_usb3 |
| Product Code: |
7567-0, J157-0 |
