草榴社区

草榴社区 SD/eMMC Host Controller IP

The 草榴社区 SD/eMMC Host Controller IP addresses the growing storage needs of mobile, consumer, IoT and automotive applications. The IP provides advanced features such as ADMA3 supporting the SD 6.0 and SDIO 4.10 specifications as well as Command Queuing Engine (CQE) supporting the SD 6.0 and eMMC 5.1 specifications. The IP also provides advanced high-performance 32- and 64-bit AXI interface to the SoC.

The IP architecture leverages power management techniques, making it ideal for low-power applications. The highly configurable and scalable IP is packaged with 草榴社区 coreConsultant tool and is optimized to reduce gate count and power consumption while ensuring compatibility with previous and future generation SD and eMMC standards.

A rigorous UVM-based verification methodology is applied to the 草榴社区 SD/eMMC Host Controller IP, consisting of directed tests and constrained random verification. The simulation-based verification is further augmented with FPGA hardware verification based on 草榴社区’ HAPS?-DX FPGA-based prototyping system. The FPGA development board is tested with all major SD cards, SDIO commands, and eMMC devices. The IP is in volume production and has been successfully implemented in a wide range of applications.

The latest encryption/decryption feature adds secure storage capabilities to Mobile and IoT SoCs. The host controller manages all transformations internal to itself and can interface with any standard eMMC device. With a super low latency design, the Mobile Storage Host controller carries out all crypto-tasks on-the-fly with popular algorithm schemes, AES-XTS and AES-CBC.

草榴社区 SD/eMMC Host Controller IP Datasheet
草榴社区 SD/eMMC PHY IP Datasheet

 

Highlights
Products
Downloads and Documentation
  • Compliant with the SD 6.0, SDIO 4.10 and eMMC 5.1 specifications and earlier versions
  • Supports advanced eMMC features including HS400 mode and built-in CQE with priority sensitive scheduling algorithm for high performance
  • Low power features with power gating and multi-power rails
  • Supports the host controller interface (HCI) specification for SD ensuring the usability of standard software drivers with support for SDMA, ADMA2 and ADMA3 modes
  • Includes high-performance 32- and 64-bit AXI bus interface
  • Supports multiple options for software-based, software-assisted and hardware-driven tuning
  • Secure eMMC supports inline AES-XTS and AES-CBC encryption/decryption algorithms at super low latency
SD/eMMC Host Controller IPSTARs Subscribe
SD/eMMC Crypto Host ControllerSTARs Subscribe
SD/eMMC Lite Host Controller IPSTARs Subscribe
Description: SD/eMMC Crypto Host Controller
Name: dwc_mshc_crypto
Version: 1.01a-lca00
ECCN: 5D002.b2/ENC
STARs: Open and/or Closed STARs
Product Type: DesignWare Cores
Documentation:
Toolsets: Qualified Toolsets
Download: dw_iip_DWC_mshc_crypto
Product Code: C378-0
Description: SD/eMMC Host Controller IP
Name: dwc_mshc
Version: 2.00a
ECCN: 3E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Toolsets: Qualified Toolsets
Download: dw_iip_DWC_mshc
Product Code: A555-0
Description: SD/eMMC Lite Host Controller IP
Name: dwc_mshc_lite
Version: 2.00a
ECCN: 3E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Toolsets: Qualified Toolsets
Download: dw_iip_DWC_mshc
Product Code: B143-0