草榴社区

草榴社区 Secure LPDDR5X/5/4X Controller IP

草榴社区 LPDDR5X/5/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5X, LPDDR5 and LPDDR4X SDRAMs. The controller connects to the 草榴社区 LPDDR5X/5/4X PHY or other LPDDR5X/5/4X PHYs via the DFI 5.0 interface to create a complete memory interface solution. The 草榴社区 LPDDR5X/5/4X Controller includes software configuration registers, which are accessed through an AMBA 3.0 APB interface. The LPDDR controller block includes the advanced command scheduler, memory protocol handler, optional inline ECC (Error-correcting code), and dual channel support, as well as the DFI interface to the PHY.

The 草榴社区 LPDDR Controller seamlessly integrates the 草榴社区 Inline Memory Encryption (IME) Security Module to provide confidentiality of data in-use or stored in off-chip memory. 草榴社区 Secure LPDDR Controller IP supports data confidentiality with standards-compliant independent cryptographic support for read/write channels, per region encryption/decryption and is highly optimized for area, performance and latency. The encryption/decryption latency overhead for the 草榴社区 secure memory controllers is as low as 2 clock cycles.

Learn about the broad portfolio of Security 草榴社区 for Interfaces.


草榴社区 LPDDR5X/5/4X Controller IP Datasheet

 

Highlights
Products
Downloads and Documentation
  • Supports JEDEC standard LPDDR5X, LPDDR5 and LPDDR4X SDRAMs
  • Multiport Arm? AMBA? interface (AXI?4 / AXI? 3) with managed QoS or single-port host interface to the DDR controller
  • DFI 5.0 compliant interface to 草榴社区 LPDDR5X/5/4X PHY and other LPDDR5X/5/4X PHYs
  • Best-in-class performance with unique features such as QoS-based scheduling, inline ECC, and dual-channel support
  • High-bandwidth design with up to 64 CAM entries for reads and 64 CAM entries for writes; latency as low as 8 clock cycles
  • UVM testbench with embedded assertions and options to incorporate an LPDDR5X/5/4X PHY into a verification environment
  • Secure Controller: Integrated IME Security Module for data confidentiality
LPDDR Controller ASIL B Compliant supporting LPDDR5X, LPDDR5 and LPDDR4X for Automotive ApplicationsSTARs Subscribe
LPDDR Controller supporting LPDDR5X, LPDDR5, and LPDDR4XSTARs Subscribe
LPDDR Controller supporting LPDDR5X, LPDDR5 and LPDDR4X with Advanced Features PackageSTARs Subscribe
LPDDR Secure Controller supporting LPDDR5X, LPDDR5 and LPDDR4X with Advanced Features PackageSTARs Subscribe
Description: LPDDR Controller ASIL B Compliant supporting LPDDR5X, LPDDR5 and LPDDR4X for Automotive Applications
Name: dwc_ac_lpddr5x_controller
Version: 1.50a-lca10
ECCN: 3E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dw_iip_ap_DWC_ac_ddrctl_lpddr54
Product Code: H716-0
Description: LPDDR Controller supporting LPDDR5X, LPDDR5 and LPDDR4X with Advanced Features Package
Name: dwc_lpddr5x_controller_afp
Version: 1.60a-lca00
ECCN: 3E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Toolsets: Qualified Toolsets
Download: dw_iip_DWC_ddrctl_lpddr54
Product Code: H508-0
Description: LPDDR Controller supporting LPDDR5X, LPDDR5, and LPDDR4X
Name: dwc_lpddr5x_controller
Version: 1.60a-lca00
ECCN: 3E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Toolsets: Qualified Toolsets
Download: dw_iip_DWC_ddrctl_lpddr54
Product Code: H507-0
Description: LPDDR Secure Controller supporting LPDDR5X, LPDDR5 and LPDDR4X with Advanced Features Package
Name: dwc_lpddr5x_ime_controller
Version: 1.50a-lca00
ECCN: 5D002.b2/ENC
STARs: Open and/or Closed STARs
Product Type: DesignWare Cores
Documentation:
Toolsets: Qualified Toolsets
Download: dw_iip_DWC_ddrctl_lpddr54_secure
Product Code: H913-0