草榴社区 eUSB2 PHY IP
草榴社区 provides designers with silicon-proven, configurable eUSB2 PHYs that are compliant with the USB-Implementers Forum (USB-IF) eUSB2 and USB 2.0 specifications. 草榴社区 eUSB2 PHY IP has industry's best combination of low area and low power in leading process technologies from 7nm and below.
The 草榴社区 eUSB2 IP is built on years of customer successes with 草榴社区’ silicon-proven USB PHY product line, which has been ported to over 100 process nodes ranging from 180nm to 5nm.
With over 3,000 design wins and over 4 billion silicon-proven units shipped, 草榴社区' USB IP solution, consisting of digital controllers, PHYs, IP subsystems, and verification IP, enables designers to lower integration risk and speed time-to-market.
eUSB2 IP解决方案 草榴社区 eUSB2 IP Solution Datasheet
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| Enabling USB 2.0 in Advanced Process Nodes Using DesignWare eUSB2 IP USB 2.0 has been around for over 20 years and is the world's most popular wired interconnect standard. Join Morten Christiansen and Gervais Fong as they discuss how the new eUSB2 standard enables USB 2.0 connectivity for SoCs in the most advanced process nodes. |
- Designed for 7nm processes and below
- Supports the USB 2.0 protocol and High Speed, Full Speed, and Low Speed data rates
- eUSB2 PHYs supports USB 2.0, 3.0, 3.1 and 3.2 Device, Host and Dual Role configurations
| eUSB 2.0 PHY - TSMC N3E x1, North/South (vertical) poly orientation | STARs | Subscribe |
| eUSB 2.0 PHY - TSMC N3P x1, North/South (vertical) poly orientation | STARs | Subscribe |
| eUSB 2.0 PHY - TSMC N4P x1, North/South (vertical) poly orientation | STARs | Subscribe |
| eUSB 2.0 PHY - TSMC N5 x1, North/South (vertical) poly orientation | STARs | Subscribe |
| Description: | eUSB 2.0 PHY - TSMC N3E x1, North/South (vertical) poly orientation |
| Name: | dwc_eusb2_phy_tsmc3eff12_x1ns |
| Version: | 1.03a |
| ECCN: | 5E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | dwc_eusb2_phy_tsmc3eff12_x1ns |
| Product Code: | G241-0 |
| Description: | eUSB 2.0 PHY - TSMC N3P x1, North/South (vertical) poly orientation |
| Name: | dwc_eusb2_phy_tsmc3pff12_x1ns |
| Version: | 1.00b |
| ECCN: | 5E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | dwc_eusb2_phy_tsmc3pff12_x1ns |
| Product Code: | G241-0 |
| Description: | eUSB 2.0 PHY - TSMC N4P x1, North/South (vertical) poly orientation |
| Name: | dwc_eusb2_phy_tsmc4ffp12_x1ns |
| Version: | 1.01a |
| ECCN: | 5E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | dwc_eusb2_phy_tsmc4ffp12_x1ns |
| Product Code: | H113-0 |
| Description: | eUSB 2.0 PHY - TSMC N5 x1, North/South (vertical) poly orientation |
| Name: | dwc_eusb2_phy_tsmc5ff12_x1ns |
| Version: | 1.05b |
| ECCN: | 5E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | dwc_eusb2_phy_tsmc5ff12_x1ns |
| Product Code: | E502-0 |