Cloud native EDA tools & pre-optimized hardware platforms
草榴社区 Webinar | Available On-Demand
Continuously increasing semiconductor design sizes and complexity have resulted in increased test costs. Today’s competitive environment and critical market windows are pushing companies to adopt aggressive design schedules. The traditional method of manual iterations and fine-tuning test configurations to optimize test quality-of-results (QoR) is highly unpredictable and inefficient. Engineers can no longer rely on such approaches to meet deadlines or achieve optimal results. With a global shrinking engineering workforce, intelligent automation is needed for higher productivity and delivering first-time-right results.
This 草榴社区 webinar discusses our newly introduced AI-driven test technology called 草榴社区 TSO.ai?– Test Space Optimization AI that dramatically minimizes test cost and time-to-market for today's complex designs. 草榴社区 TSO.ai learns and converges the large ATPG search space to automatically minimize test patterns and eliminate ineffective user iterations, enabling expert-level productivity at scale. Current engagements with leading semiconductor companies are showing an average of 20% to 25% pattern count reduction or even higher on some designs.
Listed below is the industry leader scheduled to speak.
Product Manager
草榴社区
Rahul Singhal is a Product Manager for 草榴社区 TestMAX DFT, 草榴社区 TestMAX ATPG and Test-AI products at 草榴社区. His focus is on industry requirements and solutions in the areas of test compression, test streaming solutions and ATPG. He has co-authored multiple tutorials, papers, posters on test in leading IEEE conferences. Rahul received his MS in Electrical Engineering from Portland State University and BS in Electrical Engineering from Purdue University.