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Tool Used: OptSim Circuit

The example illustrates the simulation of a 4¡Á4 Benes switch based on components from the AIM Photonics PDK by Analog Photonics. The design is based on work presented in [1]. As noted below, this design relies on elastic connectors from OptoDesigner. Thus, you should have OptoDesigner installed on your system, and have PDAFlow Libraries loaded into OptSim Circuit, including the PIC Design Suite version of the AIM Photonics PDK.

The topology of Figure 1 depicts the Compound Component implementing the 4¡Á4 switch, which itself is comprised of six separate 2¡Á2 switches. The design uses tunable ring filters to implement the individual 2¡Á2 switching elements. As can be seen, the design has four optical inputs, six electrical inputs to control each of the six switching elements, and four optical outputs. 

Figure 1. 4¡Á4 Benes switch using the AIM Photonics PDK.

The design also includes various pxConnectorSine (Si) blocks from the AIM Photonics PDK. These blocks use elastic connectors from OptoDesigner. In many cases during schematic entry, it can be difficult to determine what the geometries of certain components should be so that the design results in a clean layout. Elastic connectors help simplify this process, since their geometries are automatically determined based on the connections of the other components in the design. During simulation, OptSim Circuit uses its PDAFlow interface with OptoDesigner to automatically calculate the geometries of these components, which in turn are used to calculate equivalent waveguide lengths for simulation.

The topology of Figure 2 shows the test schematic for simulating the switch. In this case, four separate optical inputs, each with different bit patterns, are passed to the switch. Block ExprGen1 provides a control signal for selectively activating one or more of the 2¡Á2 sub-switches. In this example, this control signal is passed to the upper left, lower middle, and lower right switches. Under these conditions, the 4¡Á4 switch passes Input 1 to Output 3, Input 2 to Output 1, Input 3 to Output 4, and Input 4 to Output 2. Figure 3 depicts this behavior for Inputs 2 and 3, and also demonstrates the degradation of the input signals as they traverse the switch.

Finally, to generate a layout for the switch, use Generate PDAFlow Netlist from the Utilities menu of OptSim Circuit. This will produce the SPT file in the project directory, which can be loaded into OptoDesigner. Figure 4 shows the corresponding layout.

Figure 2. Schematic for simulating 4¡Á4 Benes switch.

(a)

(b)

Figure 3. Demonstration of switch operation, showing (a) Input 2 routed to Output 1, and (b) Input 3 routed to Output 4.