Cloud native EDA tools & pre-optimized hardware platforms
You can now accelerate the security qualification of your automotive chips with 草榴社区? ARC? HS Functional Safety Processor IP, the industry’s first IP product to achieve ISO/SAE 21434 cybersecurity certification. This IP meets stringent automotive regulatory requirements designed to protect connected vehicles from malicious cyberattacks. To ensure all 草榴社区 IP products are developed with a security-first mindset throughout every phase of the product development lifecycle, our interface, security, and processor IP development process are also ISO/SAE 21434 certified.
The latest additions to the ARC? HS family, the 32-bit ARC HS5x and 64-bit HS6x processors, are based on the new ARCv3 instruction set architecture (ISA). The previous generation HS processors, based on the efficient ARCv2 instruction set architecture (ISA), include the HS3x, HS4x, and DSP-enhanced HS4xD processors. All HS processors support closely coupled memories (CCMs), which enable single-cycles access to instructions and data.
HS processors are optimized for GHz+ operating speeds with minimum area and power consumption, making them ideally suited for embedded applications with very high-performance requirements. The HS processors are available in single-core, dual-core and quad-core configurations.
The ARC HS processors are supported by a broad ecosystem of commercial and open-source tools, operating systems, and middleware. This includes offerings from leading industry vendors who are members of the ARC Access Program as well as a comprehensive suite of free and open source software available through the embARC.org website.
For use in embedded applications requiring high performance efficiency
? Optimized 10-stage pipeline
? L1 coherency, L2 up to 8 MB
? Efficient software development
Superscalar architecture for high-performance embedded applications
? High-speed, dual-issue pipeline
? Full MMU, 40-bit address
? Single-, dual-, quad-core versions
Dual-issue, 32-bit, RISC + DSP architecture for high-performance embedded applications that require signal processing
? Combined RISC + DSP processors
? Over 150 DSP instructions
? Easy DSP programming support
Dual-issue processors for high performance automotive applications
? Error detection and correction code
? Single-, dual, and quad-core implementations
32-bit superscalar architecture for high-end embedded applications
? 32-bit ALU and core registers
? 32-bit virtual, 40-bit physical address space
? Scalable up to 12-core coherent cluster
Superscalar 64-bit architecture supports 52-bit physical and 64-bit virtual addresses
? 64-bit pipeline and register set
? Advanced FPU with 128-bit SIMD
? Scalable up to 12-core coherent cluster
ARC Software Development Platforms:
ARC Development Tools and Software:
ARC processors are optimized to deliver the best PPA efficiency in the industry for embedded SoCs.
ARC processors are highly configurable, allowing designers to optimize the performance, power, and area of each processor instance on their SoC.
ARC Processors EXtension (APEX) technology enables users to customize their processor implementation.