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USB IP University
Simplify USB Integration
If you are new to designing with USB, or looking for tips on implementing USB 3.2, 3.1 or 3.0 IP, 草榴社区' USB University has a session for you. From a basic USB overview, to implementing USB on FPGAs, to top-level synthesis, you'll find the information you need in this instructional video series.
Want to suggest additional course material, or have questions about 草榴社区 USB IP? Contact usb.eric@synopsys.com.
Why USB4?
Understand the market drivers behind the new 40 Gbps USB4 standard. USB4 uses the USB Type-C cable and connector for blazing fast speeds. The single cable provides data, video and power while supporting multiple protocols, including USB, DisplayPort, PCI Express, and Thunderbolt.
USB 3.2 Protocol Overview
Learn about the need for USB 3.2, how the protocol can help your design achieve its need for speed, what target applications the latest protocol applies to, and the changes that will happen to particular layers, including the physical layer, link layer, and hub.
USB 3.1 Protocol Overview
Get an in-depth look at the USB 3.1 changes to the specification layers, including the physical layer (Type-C connector, repeaters), link layer (new encoding schemes and traffic classes), protocol layer (multiple INs), and hub (extra buffering and packet arbitration).
Why USB 3.0?
Understand the drivers behind the development of faster USB technology.
USB 3.0 Overview
This session introduces basic USB design concepts and the new features in USB 3.0 that designers need to understand. The session describes cables, connectors, how USB products work together, and how USB is architected as a bus.
USB 3.0 Functional Layer
View this session for an explanation of how USB stacks and drivers structure data to be handled by the protocol layer hardware.
USB 3.0 Protocol Layer – Part I
This session describes the different packet types, how they are organized, and how they are used in IN and OUT transactions.
USB 3.0 Protocol Layer – Part II
This session explains how the USB control, bulk, interrupt, and isochronous transfers are handled. The new USB 3.0 streaming feature is also explained in detail.
USB 3.0 Link Layer
This session explains how the link layer manages the port-to-port flow of data between the host and the device.
USB 3.0 Physical Layer
This session explains how the USB 3.0 electrical layer encodes digital data for transmission over a cable and decodes analog data into digital data for the link layer.
Configuring DesignWare USB 3.0 Controller as a Host
Learn how and why to select parameters involved in configuring the DesignWare USB 3.0 controller as a USB 3.0 or 2.0 host. You will also learn how to generate the RTL for your application. (Note: Accessible only using Internet Explorer; SolvNet login required.)
Configuring DesignWare USB 3.0 Controller as a Device
Learn how and why to select parameters involved in configuring the DesignWare USB 3.0 controller as a USB 3.0 or 2.0 device. You will also learn how to generate the RTL for your application. (Note: Accessible only using Internet Explorer; SolvNet login required.)
Managing Power in DesignWare USB 3.0 IP
These videos describe the various power saving techniques available in the DesignWare USB 3.0 (DWC_usb3) controller, specifically the hibernation feature. You will learn how to implement the hibernation feature for your application. (Note: Accessible only using Internet Explorer; SolvNet login required.)
USB 3.0 Controller Clocks and Clock Synthesis
In this video series, you will learn the definition of DesignWare USB 3.0 (DWC_usb3) controller clocks, impact of configuration parameters on the clocks, clock diagrams, and clocks in power management. You will also learn various clock constraints used in synthesis. (Note: Accessible only using Internet Explorer; SolvNet login required.)